[llvm] [LV] Support strided memory accesses with a stride of -1 (PR #128718)

[Mel Chen via llvm-commits]

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@@ -6132,6 +6174,16 @@ void LoopVectorizationCostModel::setCostBasedWideningDecision(ElementCount VF) {
                "Expected consecutive stride.");
         InstWidening Decision =
             ConsecutiveStride == 1 ? CM_Widen : CM_Widen_Reverse;
+        // Consider using strided load/store for consecutive reverse accesses to
+        // achieve more efficient memory operations.
+        if (ConsecutiveStride == -1 && stridedAccessCanBeWidened(&I, VF)) {
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Mel-Chen wrote:

f79aa61af75110279434c795161b629fc5835d6d
I think we can use assertion in `stridedAccessCanBeWidened`, and will patch stride analysis in `stridedAccessCanBeWidened`.

https://github.com/llvm/llvm-project/pull/128718