[llvm] [RISCV] Change RISCVMCExpr::VK_RISCV_None to RISCVMCExpr::VK_None (PR #131774)

via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 18 03:11:19 PDT 2025


https://github.com/hchandel created https://github.com/llvm/llvm-project/pull/131774

Fix RISCVMCExpr::VK_RISCV_None which were added in #130779


>From aa3c7d077fe20e915541318bcc379f8bad86fcd7 Mon Sep 17 00:00:00 2001
From: Harsh Chandel <quic_hchandel at quicinc.com>
Date: Tue, 18 Mar 2025 15:35:43 +0530
Subject: [PATCH] [RISCV] Change RISCVMCExpr::VK_RISCV_None to
 RISCVMCExpr::VK_None which were added in #130779

Change-Id: I80b8d74e1a862b482bd72cd4cd5eb4433bae8d92
---
 llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index 267d8bb1d67ba..5ac7779240148 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -823,12 +823,12 @@ struct RISCVOperand final : public MCParsedAsmOperand {
   bool isSImm5NonZero() const {
     if (!isImm())
       return false;
-    RISCVMCExpr::VariantKind VK = RISCVMCExpr::VK_RISCV_None;
+    RISCVMCExpr::VariantKind VK = RISCVMCExpr::VK_None;
     int64_t Imm;
     bool IsConstantImm = evaluateConstantImm(getImm(), Imm, VK);
     return IsConstantImm && Imm != 0 &&
            isInt<5>(fixImmediateForRV32(Imm, isRV64Imm())) &&
-           VK == RISCVMCExpr::VK_RISCV_None;
+           VK == RISCVMCExpr::VK_None;
   }
 
   bool isSImm6() const {
@@ -1021,22 +1021,22 @@ struct RISCVOperand final : public MCParsedAsmOperand {
   bool isSImm16NonZero() const {
     if (!isImm())
       return false;
-    RISCVMCExpr::VariantKind VK = RISCVMCExpr::VK_RISCV_None;
+    RISCVMCExpr::VariantKind VK = RISCVMCExpr::VK_None;
     int64_t Imm;
     bool IsConstantImm = evaluateConstantImm(getImm(), Imm, VK);
     return IsConstantImm && Imm != 0 &&
            isInt<16>(fixImmediateForRV32(Imm, isRV64Imm())) &&
-           VK == RISCVMCExpr::VK_RISCV_None;
+           VK == RISCVMCExpr::VK_None;
   }
 
   bool isUImm16NonZero() const {
     if (!isImm())
       return false;
     int64_t Imm;
-    RISCVMCExpr::VariantKind VK = RISCVMCExpr::VK_RISCV_None;
+    RISCVMCExpr::VariantKind VK = RISCVMCExpr::VK_None;
     bool IsConstantImm = evaluateConstantImm(getImm(), Imm, VK);
     return IsConstantImm && isUInt<16>(Imm) && (Imm != 0) &&
-           VK == RISCVMCExpr::VK_RISCV_None;
+           VK == RISCVMCExpr::VK_None;
   }
 
   bool isUImm20LUI() const {



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