[llvm] [AArch64] Don't try to vectorize fixed point to fp narrowing conversion (PR #130665)

[Pranav Kant via llvm-commits]

pranavk wrote:

Thanks for taking a look.

I think you are right about ->half conversions. For now, I have made this conditional on target type being f32 to try to limit the impact, and also to avoid the backend crash for one of the tests (`llvm/test/CodeGen/AArch64/sitofp-to-tbl.ll:sitofp_v8i8_to_v8f16`). 

The diffs look pretty inefficient as we guessed.

For the test that crashes, backend crashes because sitofp's operand in this test (`v8i8`) gets promoted to `v8i32` instead of custom-lowered. So the place where I added `SDValue` is never encountered which in other cases leads to `expansion` of vector ops to scalar nodes. This leads of `v8i32`in the DAG by the time we call `SelectionDAG::Legalize()` which now encounters the `return SDValue` I introduced here which leads to trying to find an appropriate libcall for v4i32 -> v4f16 conversion which fails:

```
Assertion `LC != RTLIB::UNKNOWN_LIBCALL && "Unable to legalize as libcall"' failed
...
#10 0x000055b3966f8f03 (anonymous namespace)::SelectionDAGLegalize::ConvertNodeToLibcall(llvm::SDNode*) /usr/local/google/home/prka/p/llvm/llvm_main2/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:4800:21
#11 0x000055b3966e7e92 (anonymous namespace)::SelectionDAGLegalize::LegalizeOp(llvm::SDNode*) /usr/local/google/home/prka/p/llvm/llvm_main2/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1353:7
#12 0x000055b3966e5f04 llvm::SelectionDAG::Legalize() /usr/local/google/home/prka/p/llvm/llvm_main2/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:5861:13
#13 0x000055b396891413 llvm::SelectionDAGISel::CodeGenAndEmitDAG() /usr/local/google/home/prka/p/llvm/llvm_main2/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1078:3
#14 0x000055b396890193 llvm::SelectionDAGISel::SelectBasicBlock(llvm::ilist_iterator_w_bits<llvm::ilist_detail::node_options<llvm::Instruction, true, false, void, true, llvm::BasicBlock>, false, true>, llvm::ilist_iterator_w_bits<llvm::ilist_detail::node_options<llvm::Instruction, true, false, void, true, llvm::BasicBlock>, false, true>, bool&) /usr/local/google/home/prka/p/llvm/llvm_main2/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:877:1
#15 0x000055b39688fd76 llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&) /usr/local/google/home/prka/p/llvm/llvm_main2/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1903:11
#16 0x000055b39688cd99 llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&) /usr/local/google/home/prka/p/llvm/llvm_main2/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:614:3
#17 0x000055b39482de05 (anonymous namespace)::AArch64DAGToDAGISel::runOnMachineFunction(llvm::Mach
```

https://github.com/llvm/llvm-project/pull/130665