[llvm] [AArch64][SVE] Fold integer lane extract and store to FPR store (PR #129756)
Sander de Smalen via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 17 10:35:54 PDT 2025
================
@@ -23946,17 +23960,62 @@ static SDValue performSTORECombine(SDNode *N,
if (SDValue Store = combineBoolVectorAndTruncateStore(DAG, ST))
return Store;
- if (ST->isTruncatingStore()) {
- EVT StoreVT = ST->getMemoryVT();
- if (!isHalvingTruncateOfLegalScalableType(ValueVT, StoreVT))
- return SDValue();
+ if (ST->isTruncatingStore() &&
+ isHalvingTruncateOfLegalScalableType(ValueVT, MemVT)) {
if (SDValue Rshrnb =
trySimplifySrlAddToRshrnb(ST->getOperand(1), DAG, Subtarget)) {
return DAG.getTruncStore(ST->getChain(), ST, Rshrnb, ST->getBasePtr(),
- StoreVT, ST->getMemOperand());
+ MemVT, ST->getMemOperand());
}
}
+ // This is an integer vector_extract_elt followed by a (possibly truncating)
+ // store. We may be able to replace this with a store of an FP subregister.
+ if (DCI.isAfterLegalizeDAG() && ST->isUnindexed() &&
+ Value.getOpcode() == ISD::EXTRACT_VECTOR_ELT) {
+
+ SDValue Vector = Value.getOperand(0);
+ SDValue ExtIdx = Value.getOperand(1);
+ EVT VectorVT = Vector.getValueType();
+ EVT ElemVT = VectorVT.getVectorElementType();
+ if (!ValueVT.isInteger() || ElemVT == MVT::i8 || MemVT == MVT::i8)
+ return SDValue();
+ if (ValueVT != MemVT && !ST->isTruncatingStore())
+ return SDValue();
+
+ // Heuristic: If there are other users of integer scalars extracted from
+ // this vector that won't fold into the store -- abandon folding. This may
+ // extend the vector lifetime and disrupt paired stores.
+ for (auto Use = Vector->use_begin(), End = Vector->use_end(); Use != End;
+ ++Use) {
+ if (Use->getResNo() != Vector.getResNo())
+ continue;
+ SDNode *User = Use->getUser();
----------------
sdesmalen-arm wrote:
nit:
```suggestion
for (const auto &Use : Vector->uses()) {
if (Use.getResNo() != Vector.getResNo())
continue;
const SDNode *User = Use.getUser();
```
https://github.com/llvm/llvm-project/pull/129756
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