[llvm] 37c3fbf - [X86] Add test showing failure to merge concatenatable VPERMV3 nodes
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 17 08:10:53 PDT 2025
Author: Simon Pilgrim
Date: 2025-03-17T15:10:41Z
New Revision: 37c3fbfa5ae9c124fffa4d53df708c688d8584c6
URL: https://github.com/llvm/llvm-project/commit/37c3fbfa5ae9c124fffa4d53df708c688d8584c6
DIFF: https://github.com/llvm/llvm-project/commit/37c3fbfa5ae9c124fffa4d53df708c688d8584c6.diff
LOG: [X86] Add test showing failure to merge concatenatable VPERMV3 nodes
Added:
Modified:
llvm/test/CodeGen/X86/vector-shuffle-combining-avx512vbmi.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-combining-avx512vbmi.ll b/llvm/test/CodeGen/X86/vector-shuffle-combining-avx512vbmi.ll
index ccc78823623df..1301fcb0cd0b0 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-combining-avx512vbmi.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-combining-avx512vbmi.ll
@@ -158,3 +158,22 @@ define <64 x i8> @combine_vpermi2var_v64i8_with_mask(<64 x i8> %a0, <64 x i8> %a
%sel = select <64 x i1> %cmp, <64 x i8> zeroinitializer, <64 x i8> %perm
ret <64 x i8> %sel
}
+
+define <32 x i8> @concat_vpermt2var_v16i8(<32 x i8> %x0, <32 x i8> %x1) {
+; CHECK-LABEL: concat_vpermt2var_v16i8:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vmovdqa {{.*#+}} xmm2 = [0,17,2,18,4,19,6,21,8,23,10,25,12,27,14,29]
+; CHECK-NEXT: vpermi2b %xmm1, %xmm0, %xmm2
+; CHECK-NEXT: vmovdqa {{.*#+}} xmm3 = [16,49,18,50,20,51,22,53,24,55,26,57,28,59,30,61]
+; CHECK-NEXT: vpermi2b %ymm1, %ymm0, %ymm3
+; CHECK-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm0
+; CHECK-NEXT: ret{{[l|q]}}
+ %l0 = shufflevector <32 x i8> %x0, <32 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+ %l1 = shufflevector <32 x i8> %x1, <32 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+ %h0 = shufflevector <32 x i8> %x0, <32 x i8> poison, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
+ %h1 = shufflevector <32 x i8> %x1, <32 x i8> poison, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
+ %v0 = call <16 x i8> @llvm.x86.avx512.maskz.vpermt2var.qi.128(<16 x i8> <i8 0, i8 17, i8 2, i8 18, i8 4, i8 19, i8 6, i8 21, i8 8, i8 23, i8 10, i8 25, i8 12, i8 27, i8 14, i8 29>, <16 x i8> %l0, <16 x i8> %l1, i16 -1)
+ %v1 = call <16 x i8> @llvm.x86.avx512.maskz.vpermt2var.qi.128(<16 x i8> <i8 0, i8 17, i8 2, i8 18, i8 4, i8 19, i8 6, i8 21, i8 8, i8 23, i8 10, i8 25, i8 12, i8 27, i8 14, i8 29>, <16 x i8> %h0, <16 x i8> %h1, i16 -1)
+ %res = shufflevector <16 x i8> %v0, <16 x i8> %v1, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
+ ret <32 x i8> %res
+}
More information about the llvm-commits
mailing list