[llvm] [CodeGen] Add MachineRegisterClassInfo analysis pass (PR #120690)

via llvm-commits llvm-commits at lists.llvm.org
Mon Mar 17 03:01:50 PDT 2025


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@@ -379,7 +387,9 @@ PostRASchedulerPass::run(MachineFunction &MF,
   auto &FAM = MFAM.getResult<FunctionAnalysisManagerMachineFunctionProxy>(MF)
                   .getManager();
   AliasAnalysis *AA = &FAM.getResult<AAManager>(MF.getFunction());
-  PostRAScheduler Impl(MF, MLI, AA, TM);
+  RegisterClassInfo *RegClassInfo =
+      &FAM.getResult<MachineRegisterClassInfoAnalysis>(MF.getFunction());
----------------
paperchalice wrote:

```suggestion
      &MFAM.getResult<MachineRegisterClassInfoAnalysis>(MF.getFunction());
```
BTW, nearly all analysis result types with name `FooInfo` are related to `FooAnalysis`, so `MachineRegisterClassAnalysis` would be a better name.

https://github.com/llvm/llvm-project/pull/120690


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