[llvm] [AMDGPU][CodeGen] Using MBB's liveIn check in tandem with MCRegAliasIterator in SILowerSGPRSpills (PR #129848)

Vikash Gupta via llvm-commits llvm-commits at lists.llvm.org
Mon Mar 17 02:47:11 PDT 2025


================
@@ -128,7 +126,13 @@ static void insertCSRSaves(MachineBasicBlock &SaveBlock,
       // incoming register value, so don't kill at the spill point. This happens
       // since we pass some special inputs (workgroup IDs) in the callee saved
       // range.
-      const bool IsLiveIn = MRI.isLiveIn(Reg);
+      bool IsLiveIn = false;
+      for (MCRegAliasIterator R(Reg, TRI, true); R.isValid(); ++R) {
+        if (SaveBlock.isLiveIn(*R)) {
+          IsLiveIn = true;
+          break;
+        }
+      }
----------------
vg0204 wrote:

Adderessed !

https://github.com/llvm/llvm-project/pull/129848


More information about the llvm-commits mailing list