[llvm] GlobalISel: neg (and x, 1) --> SIGN_EXTEND_INREG x, 1 (PR #131367)

[Pierre van Houtryve via llvm-commits]

================
@@ -0,0 +1,20 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
+# RUN: llc -o - -mtriple aarch64-- -run-pass=aarch64-prelegalizer-combiner %s | FileCheck %s
+---
+name: test_combine_neg_and_one_to_sext_inreg
+body: |
+  bb.1:
+  liveins: $w0
+    ; CHECK-LABEL: name: test_combine_neg_and_one_to_sext_inreg
+    ; CHECK: liveins: $w0
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
+    ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 1
+    ; CHECK-NEXT: $w0 = COPY [[SEXT_INREG]](s32)
+    %0:_(s32) = COPY $w0
+    %1:_(s32) = G_CONSTANT i32 1
+    %3:_(s32) = G_CONSTANT i32 0
+    %2:_(s32) = G_AND %0:_, %1:_
+    %4:_(s32) = G_SUB %3:_, %2:_
+    $w0 = COPY %4:_(s32)
+...
----------------
Pierre-vh wrote:

Yes please test a few scalar types (2-3) and vector equivalents.

https://github.com/llvm/llvm-project/pull/131367