[llvm] [X86][NFC] Add missing immediate qualifier to VSM3RNDS2 instruction (PR #131576)

[Phoebe Wang via llvm-commits]

https://github.com/phoebewang created https://github.com/llvm/llvm-project/pull/131576

None

>From 59341eb39d881edabed4374d2260ae63ac8f1927 Mon Sep 17 00:00:00 2001
From: "Wang, Phoebe" <phoebe.wang at intel.com>
Date: Mon, 17 Mar 2025 15:41:58 +0800
Subject: [PATCH] [X86][NFC] Add missing immediate qualifier to VSM3RNDS2
 instruction

---
 llvm/lib/Target/X86/X86InstrSSE.td     | 4 ++--
 llvm/test/TableGen/x86-fold-tables.inc | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td
index 2a7ab1e310618..49a62fd3422d0 100644
--- a/llvm/lib/Target/X86/X86InstrSSE.td
+++ b/llvm/lib/Target/X86/X86InstrSSE.td
@@ -8384,14 +8384,14 @@ let Predicates = [HasSM3], Constraints = "$src1 = $dst" in {
   }
 
   multiclass VSM3RNDS2_Base {
-    def rr : Ii8<0xde, MRMSrcReg, (outs VR128:$dst),
+    def rri : Ii8<0xde, MRMSrcReg, (outs VR128:$dst),
               (ins VR128:$src1, VR128:$src2, VR128:$src3, i32u8imm:$src4),
               "vsm3rnds2\t{$src4, $src3, $src2, $dst|$dst, $src2, $src3, $src4}",
               [(set VR128:$dst,
                (int_x86_vsm3rnds2 VR128:$src1,
                 VR128:$src2, VR128:$src3, timm:$src4))]>,
               Sched<[WriteVecIMul]>;
-    def rm : Ii8<0xde, MRMSrcMem, (outs VR128:$dst),
+    def rmi : Ii8<0xde, MRMSrcMem, (outs VR128:$dst),
               (ins VR128:$src1, VR128:$src2, i128mem:$src3, i32u8imm:$src4),
               "vsm3rnds2\t{$src4, $src3, $src2, $dst|$dst, $src2, $src3, $src4}",
               [(set VR128:$dst,
diff --git a/llvm/test/TableGen/x86-fold-tables.inc b/llvm/test/TableGen/x86-fold-tables.inc
index 18b138f86f778..9a5ed0452d08a 100644
--- a/llvm/test/TableGen/x86-fold-tables.inc
+++ b/llvm/test/TableGen/x86-fold-tables.inc
@@ -6025,7 +6025,7 @@ static const X86FoldTableEntry Table3[] = {
   {X86::VSHUFPSZrrikz, X86::VSHUFPSZrmikz, 0},
   {X86::VSM3MSG1rr, X86::VSM3MSG1rm, 0},
   {X86::VSM3MSG2rr, X86::VSM3MSG2rm, 0},
-  {X86::VSM3RNDS2rr, X86::VSM3RNDS2rm, 0},
+  {X86::VSM3RNDS2rri, X86::VSM3RNDS2rmi, 0},
   {X86::VSQRTBF16Z128rk, X86::VSQRTBF16Z128mk, 0},
   {X86::VSQRTBF16Z256rk, X86::VSQRTBF16Z256mk, 0},
   {X86::VSQRTBF16Zrk, X86::VSQRTBF16Zmk, 0},