[llvm] [AArch64][GlobalISel] Perfect Shuffles (PR #106446)

[Matt Arsenault via llvm-commits]

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@@ -1365,6 +1365,24 @@ class MachineIRBuilder {
                                                const SrcOp &Elt,
                                                const SrcOp &Idx);
 
+  /// Build and insert \p Res = G_INSERT_VECTOR_ELT \p Val, \p Elt, \p Idx
+  ///
+  /// \pre setBasicBlock or setMI must have been called.
+  /// \pre \p Res must be a generic virtual register with scalar type.
+  /// \pre \p Val must be a generic virtual register with vector type.
+  /// \pre \p Elt must be a generic virtual register with scalar type.
+  ///
+  /// \return The newly created instruction.
+  MachineInstrBuilder buildInsertVectorElementConstant(const DstOp &Res,
+                                                       const SrcOp &Val,
+                                                       const SrcOp &Elt,
+                                                       const int Idx) {
+    auto TLI = getMF().getSubtarget().getTargetLowering();
+    unsigned VecIdxWidth = TLI->getVectorIdxTy(getDataLayout()).getSizeInBits();
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arsenm wrote:

Should have a version of this that directly returns LLT. 

I'm also not sure how I feel about requiring TLI in these low level build functions. For the most part, you could just use i64 and let it legalize as required (but this does present an issue after legalization) 

https://github.com/llvm/llvm-project/pull/106446