[llvm] [X86] Combine bitcast(v1Ty insert_vector_elt(X, Y, 0)) to Y (PR #130475)

[Phoebe Wang via llvm-commits]

https://github.com/phoebewang created https://github.com/llvm/llvm-project/pull/130475

Though it only happens in v1i1 when we generate llvm.masked.load/store intrinsics for APX cload/cstore.

https://godbolt.org/z/vjsrofsqx

>From ffb0483fc9fc7c3f672d38dac9fa1b3ace5b5800 Mon Sep 17 00:00:00 2001
From: "Wang, Phoebe" <phoebe.wang at intel.com>
Date: Sun, 9 Mar 2025 16:26:02 +0800
Subject: [PATCH] [X86] Combine bitcast(v1Ty insert_vector_elt(X, Y, 0)) to Y

Though it only happens in v1i1 when we generate llvm.masked.load/store intrinsics for APX cload/cstore.

https://godbolt.org/z/vjsrofsqx
---
 llvm/lib/Target/X86/X86ISelLowering.cpp |  5 +++++
 llvm/test/CodeGen/X86/apx/cf.ll         | 15 +++++++++++++++
 2 files changed, 20 insertions(+)

diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 1992ef67164d8..be45a678bbcfe 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -45486,6 +45486,11 @@ static SDValue combineBitcast(SDNode *N, SelectionDAG &DAG,
   if (SDValue V = combineCastedMaskArithmetic(N, DAG, DCI, Subtarget))
     return V;
 
+  // bitcast(v1Ty insert_vector_elt(X, Y, 0)) --> Y
+  if (N0.getOpcode() == ISD::INSERT_VECTOR_ELT && SrcVT.getScalarType() == VT &&
+      SrcVT.getVectorNumElements() == 1)
+    return N0.getOperand(1);
+
   // Convert a bitcasted integer logic operation that has one bitcasted
   // floating-point operand into a floating-point logic operation. This may
   // create a load of a constant, but that is cheaper than materializing the
diff --git a/llvm/test/CodeGen/X86/apx/cf.ll b/llvm/test/CodeGen/X86/apx/cf.ll
index c71d7768834f3..216f187d986d6 100644
--- a/llvm/test/CodeGen/X86/apx/cf.ll
+++ b/llvm/test/CodeGen/X86/apx/cf.ll
@@ -124,3 +124,18 @@ entry:
   call void @llvm.masked.store.v4i64.p0(<4 x i64> %0, ptr %p, i32 8, <4 x i1> %cond2)
   ret void
 }
+
+define void @no_xor(i32 %a, i32 %b, ptr %c, ptr %d) #2 {
+; CHECK-LABEL: no_xor:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    cmpl %esi, %edi
+; CHECK-NEXT:    cfcmovnew (%rdx), %ax
+; CHECK-NEXT:    cfcmovnew %ax, (%rcx)
+; CHECK-NEXT:    retq
+entry:
+  %0 = icmp ne i32 %a, %b
+  %1 = insertelement <1 x i1> poison, i1 %0, i64 0
+  %2 = tail call <1 x i16> @llvm.masked.load.v1i16.p0(ptr %c, i32 2, <1 x i1> %1, <1 x i16> poison)
+  tail call void @llvm.masked.store.v1i16.p0(<1 x i16> %2, ptr %d, i32 2, <1 x i1> %1)
+  ret void
+}