[llvm] 379405a - [X86] Fix typo in X86ISD::SHUFP concatenation
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sat Mar 8 11:33:17 PST 2025
Author: Simon Pilgrim
Date: 2025-03-08T19:32:48Z
New Revision: 379405afc074d251330dd0fa104d1735d4ce175b
URL: https://github.com/llvm/llvm-project/commit/379405afc074d251330dd0fa104d1735d4ce175b
DIFF: https://github.com/llvm/llvm-project/commit/379405afc074d251330dd0fa104d1735d4ce175b.diff
LOG: [X86] Fix typo in X86ISD::SHUFP concatenation
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 6e68b8ad0b7ab..1992ef67164d8 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -58007,7 +58007,8 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
case X86ISD::SHUFP: {
// Add SHUFPD support if/when necessary.
if (!IsSplat &&
- (VT == MVT::v8f32 || (MVT::v16f32 && Subtarget.useAVX512Regs())) &&
+ (VT == MVT::v8f32 ||
+ (VT == MVT::v16f32 && Subtarget.useAVX512Regs())) &&
llvm::all_of(Ops, [Op0](SDValue Op) {
return Op.getOperand(2) == Op0.getOperand(2);
})) {
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