[llvm] [SPIRV] Avoid repeated hash lookups (NFC) (PR #130391)
Kazu Hirata via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 7 19:54:57 PST 2025
https://github.com/kazutakahirata created https://github.com/llvm/llvm-project/pull/130391
None
>From f6ae7285586bae32aca66f2b5208a3cd27b60c63 Mon Sep 17 00:00:00 2001
From: Kazu Hirata <kazu at google.com>
Date: Fri, 7 Mar 2025 01:04:35 -0800
Subject: [PATCH] [SPIRV] Avoid repeated hash lookups (NFC)
---
llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp b/llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
index baacd58b28028..3779a4b6ccd34 100644
--- a/llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
@@ -120,8 +120,9 @@ addConstantsToTrack(MachineFunction &MF, SPIRVGlobalRegistry *GR,
}
for (MachineInstr *MI : ToErase) {
Register Reg = MI->getOperand(2).getReg();
- if (RegsAlreadyAddedToDT.contains(MI))
- Reg = RegsAlreadyAddedToDT[MI];
+ auto It = RegsAlreadyAddedToDT.find(MI);
+ if (It != RegsAlreadyAddedToDT.end())
+ Reg = It->second;
auto *RC = MRI.getRegClassOrNull(MI->getOperand(0).getReg());
if (!MRI.getRegClassOrNull(Reg) && RC)
MRI.setRegClass(Reg, RC);
@@ -652,7 +653,7 @@ generateAssignInstrs(MachineFunction &MF, SPIRVGlobalRegistry *GR,
}
for (MachineInstr *MI : ToErase) {
auto It = RegsAlreadyAddedToDT.find(MI);
- if (RegsAlreadyAddedToDT.contains(MI))
+ if (It != RegsAlreadyAddedToDT.end())
MRI.replaceRegWith(MI->getOperand(0).getReg(), It->second);
MI->eraseFromParent();
}
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