[llvm] [GVN] Add MemorySSA checks in tests 1/N (PR #130261)

via llvm-commits llvm-commits at lists.llvm.org
Fri Mar 7 00:48:36 PST 2025


llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-llvm-transforms

Author: Madhur Amilkanthwar (madhur13490)

<details>
<summary>Changes</summary>

There is no test coverage for MemorySSA for GVN tests. We should keep testing MemorySSA if we eventually want to make it the default. 

---
Full diff: https://github.com/llvm/llvm-project/pull/130261.diff


4 Files Affected:

- (modified) llvm/test/Transforms/GVN/assume.ll (+26) 
- (modified) llvm/test/Transforms/GVN/basic.ll (+12-6) 
- (modified) llvm/test/Transforms/GVN/nonescaping.ll (+16) 
- (modified) llvm/test/Transforms/GVN/pr14166.ll (+20-7) 


``````````diff
diff --git a/llvm/test/Transforms/GVN/assume.ll b/llvm/test/Transforms/GVN/assume.ll
index 6cb4c871750d6..a1c485108622e 100644
--- a/llvm/test/Transforms/GVN/assume.ll
+++ b/llvm/test/Transforms/GVN/assume.ll
@@ -1,5 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -passes=gvn -verify-analysis-invalidation -S | FileCheck %s
+; RUN: opt < %s -passes='require<memoryssa>,gvn' -verify-analysis-invalidation -S | FileCheck --check-prefix=CHECK-MSSA %s
 
 declare void @llvm.assume(i1)
 declare void @use(i1)
@@ -7,6 +8,9 @@ declare void @use(i1)
 define void @assume_true() {
 ; CHECK-LABEL: @assume_true(
 ; CHECK-NEXT:    ret void
+;
+; CHECK-MSSA-LABEL: @assume_true(
+; CHECK-MSSA-NEXT:    ret void
 ;
   call void @llvm.assume(i1 true)
   ret void
@@ -16,6 +20,10 @@ define void @assume_false() {
 ; CHECK-LABEL: @assume_false(
 ; CHECK-NEXT:    store i8 poison, ptr null, align 1
 ; CHECK-NEXT:    ret void
+;
+; CHECK-MSSA-LABEL: @assume_false(
+; CHECK-MSSA-NEXT:    store i8 poison, ptr null, align 1
+; CHECK-MSSA-NEXT:    ret void
 ;
   call void @llvm.assume(i1 false)
   ret void
@@ -26,6 +34,11 @@ define void @assume_arg(i1 %x) {
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[X:%.*]])
 ; CHECK-NEXT:    call void @use(i1 true)
 ; CHECK-NEXT:    ret void
+;
+; CHECK-MSSA-LABEL: @assume_arg(
+; CHECK-MSSA-NEXT:    call void @llvm.assume(i1 [[X:%.*]])
+; CHECK-MSSA-NEXT:    call void @use(i1 true)
+; CHECK-MSSA-NEXT:    ret void
 ;
   call void @llvm.assume(i1 %x)
   call void @use(i1 %x)
@@ -38,6 +51,12 @@ define void @assume_not_arg(i1 %x) {
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[XOR]])
 ; CHECK-NEXT:    call void @use(i1 false)
 ; CHECK-NEXT:    ret void
+;
+; CHECK-MSSA-LABEL: @assume_not_arg(
+; CHECK-MSSA-NEXT:    [[XOR:%.*]] = xor i1 [[X:%.*]], true
+; CHECK-MSSA-NEXT:    call void @llvm.assume(i1 [[XOR]])
+; CHECK-MSSA-NEXT:    call void @use(i1 false)
+; CHECK-MSSA-NEXT:    ret void
 ;
   %xor = xor i1 %x, true
   call void @llvm.assume(i1 %xor)
@@ -52,6 +71,13 @@ define void @pr47496(i8 %x) {
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[XOR]])
 ; CHECK-NEXT:    call void @use(i1 false)
 ; CHECK-NEXT:    ret void
+;
+; CHECK-MSSA-LABEL: @pr47496(
+; CHECK-MSSA-NEXT:    [[CMP:%.*]] = icmp slt i8 [[X:%.*]], 0
+; CHECK-MSSA-NEXT:    [[XOR:%.*]] = xor i1 [[CMP]], true
+; CHECK-MSSA-NEXT:    call void @llvm.assume(i1 [[XOR]])
+; CHECK-MSSA-NEXT:    call void @use(i1 false)
+; CHECK-MSSA-NEXT:    ret void
 ;
   %cmp = icmp slt i8 %x, 0
   %xor = xor i1 %cmp, true
diff --git a/llvm/test/Transforms/GVN/basic.ll b/llvm/test/Transforms/GVN/basic.ll
index 09155bf4cf2fd..b6dfeab85241c 100644
--- a/llvm/test/Transforms/GVN/basic.ll
+++ b/llvm/test/Transforms/GVN/basic.ll
@@ -1,15 +1,21 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
 ; RUN: opt < %s -passes=gvn -S | FileCheck %s
+; RUN: opt < %s -passes='require<memoryssa>,gvn' -S | FileCheck --check-prefix=CHECK-MSSA %s
 
 define i32 @main() {
+; CHECK-LABEL: define i32 @main() {
+; CHECK-NEXT:  [[BLOCK1:.*:]]
+; CHECK-NEXT:    ret i32 0
+;
+; CHECK-MSSA-LABEL: define i32 @main() {
+; CHECK-MSSA-NEXT:  [[BLOCK1:.*:]]
+; CHECK-MSSA-NEXT:    ret i32 0
+;
 block1:
-	%z1 = bitcast i32 0 to i32
-	br label %block2
+  %z1 = bitcast i32 0 to i32
+  br label %block2
 block2:
   %z2 = bitcast i32 0 to i32
   ret i32 %z2
 }
 
-; CHECK: define i32 @main() {
-; CHECK-NEXT: block1:
-; CHECK-NEXT:   ret i32 0
-; CHECK-NEXT: }
diff --git a/llvm/test/Transforms/GVN/nonescaping.ll b/llvm/test/Transforms/GVN/nonescaping.ll
index ad6fa1db0f93e..6e978586763f1 100644
--- a/llvm/test/Transforms/GVN/nonescaping.ll
+++ b/llvm/test/Transforms/GVN/nonescaping.ll
@@ -1,5 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -S -passes=gvn 2>&1 | FileCheck %s
+; RUN: opt < %s -S -passes='require<memoryssa>,gvn' 2>&1 | FileCheck --check-prefix=CHECK-MSSA %s
 
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
 
@@ -13,6 +14,11 @@ define i8 @test_malloc(ptr %p) {
 ; CHECK-NEXT:    [[OBJ:%.*]] = call ptr @malloc(i64 16)
 ; CHECK-NEXT:    call void @escape(ptr [[OBJ]])
 ; CHECK-NEXT:    ret i8 0
+;
+; CHECK-MSSA-LABEL: @test_malloc(
+; CHECK-MSSA-NEXT:    [[OBJ:%.*]] = call ptr @malloc(i64 16)
+; CHECK-MSSA-NEXT:    call void @escape(ptr [[OBJ]])
+; CHECK-MSSA-NEXT:    ret i8 0
 ;
   %v1 = load i8, ptr %p
   %obj = call ptr @malloc(i64 16)
@@ -27,6 +33,11 @@ define i8 @test_calloc(ptr %p) {
 ; CHECK-NEXT:    [[OBJ:%.*]] = call ptr @calloc(i64 1, i64 16)
 ; CHECK-NEXT:    call void @escape(ptr [[OBJ]])
 ; CHECK-NEXT:    ret i8 0
+;
+; CHECK-MSSA-LABEL: @test_calloc(
+; CHECK-MSSA-NEXT:    [[OBJ:%.*]] = call ptr @calloc(i64 1, i64 16)
+; CHECK-MSSA-NEXT:    call void @escape(ptr [[OBJ]])
+; CHECK-MSSA-NEXT:    ret i8 0
 ;
   %v1 = load i8, ptr %p
   %obj = call ptr @calloc(i64 1, i64 16)
@@ -41,6 +52,11 @@ define i8 @test_opnew(ptr %p) {
 ; CHECK-NEXT:    [[OBJ:%.*]] = call ptr @_Znwm(i64 16)
 ; CHECK-NEXT:    call void @escape(ptr [[OBJ]])
 ; CHECK-NEXT:    ret i8 0
+;
+; CHECK-MSSA-LABEL: @test_opnew(
+; CHECK-MSSA-NEXT:    [[OBJ:%.*]] = call ptr @_Znwm(i64 16)
+; CHECK-MSSA-NEXT:    call void @escape(ptr [[OBJ]])
+; CHECK-MSSA-NEXT:    ret i8 0
 ;
   %v1 = load i8, ptr %p
   %obj = call ptr @_Znwm(i64 16)
diff --git a/llvm/test/Transforms/GVN/pr14166.ll b/llvm/test/Transforms/GVN/pr14166.ll
index 3379a5f604b0b..0bfd0d8a4a01e 100644
--- a/llvm/test/Transforms/GVN/pr14166.ll
+++ b/llvm/test/Transforms/GVN/pr14166.ll
@@ -1,6 +1,26 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
 ; RUN: opt -disable-basic-aa -passes=gvn -S < %s | FileCheck %s
+; RUN: opt -disable-basic-aa -passes='require<memoryssa>,gvn' -S < %s | FileCheck --check-prefix=CHECK-MSSA %s
 target datalayout = "e-p:32:32:32"
 define <2 x i32> @test1() {
+; CHECK-LABEL: define <2 x i32> @test1() {
+; CHECK-NEXT:    [[V1:%.*]] = alloca <2 x i32>, align 8
+; CHECK-NEXT:    call void @anything(ptr [[V1]])
+; CHECK-NEXT:    [[V2:%.*]] = load <2 x i32>, ptr [[V1]], align 8
+; CHECK-NEXT:    [[V3:%.*]] = inttoptr <2 x i32> [[V2]] to <2 x ptr>
+; CHECK-NEXT:    store <2 x ptr> [[V3]], ptr [[V1]], align 8
+; CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[V2]] to i64
+; CHECK-NEXT:    ret <2 x i32> [[V2]]
+;
+; CHECK-MSSA-LABEL: define <2 x i32> @test1() {
+; CHECK-MSSA-NEXT:    [[V1:%.*]] = alloca <2 x i32>, align 8
+; CHECK-MSSA-NEXT:    call void @anything(ptr [[V1]])
+; CHECK-MSSA-NEXT:    [[V2:%.*]] = load <2 x i32>, ptr [[V1]], align 8
+; CHECK-MSSA-NEXT:    [[V3:%.*]] = inttoptr <2 x i32> [[V2]] to <2 x ptr>
+; CHECK-MSSA-NEXT:    store <2 x ptr> [[V3]], ptr [[V1]], align 8
+; CHECK-MSSA-NEXT:    [[TMP1:%.*]] = bitcast <2 x i32> [[V2]] to i64
+; CHECK-MSSA-NEXT:    ret <2 x i32> [[V2]]
+;
   %v1 = alloca <2 x i32>
   call void @anything(ptr %v1)
   %v2 = load <2 x i32>, ptr %v1
@@ -8,13 +28,6 @@ define <2 x i32> @test1() {
   store <2 x ptr> %v3, ptr %v1
   %v5 = load <2 x i32>, ptr %v1
   ret <2 x i32> %v5
-; CHECK-LABEL: @test1(
-; CHECK: %v1 = alloca <2 x i32>
-; CHECK: call void @anything(ptr %v1)
-; CHECK: %v2 = load <2 x i32>, ptr %v1
-; CHECK: %v3 = inttoptr <2 x i32> %v2 to <2 x ptr>
-; CHECK: store <2 x ptr> %v3, ptr %v1
-; CHECK: ret <2 x i32> %v2
 }
 
 declare void @anything(ptr)

``````````

</details>


https://github.com/llvm/llvm-project/pull/130261


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