[llvm] PeepholeOpt: Remove subreg def check for insert_subreg (PR #130085)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Thu Mar 6 16:34:55 PST 2025


https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/130085

>From 590e6632633b73b6ad0bccfc6d9638c3779629ac Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Thu, 6 Mar 2025 18:51:01 +0700
Subject: [PATCH] PeepholeOpt: Remove subreg def check for insert_subreg

---
 llvm/lib/CodeGen/PeepholeOptimizer.cpp | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/llvm/lib/CodeGen/PeepholeOptimizer.cpp b/llvm/lib/CodeGen/PeepholeOptimizer.cpp
index 2a328039c3032..4d0fd86eb216f 100644
--- a/llvm/lib/CodeGen/PeepholeOptimizer.cpp
+++ b/llvm/lib/CodeGen/PeepholeOptimizer.cpp
@@ -2028,12 +2028,7 @@ ValueTrackerResult ValueTracker::getNextSourceFromRegSequence() {
 ValueTrackerResult ValueTracker::getNextSourceFromInsertSubreg() {
   assert((Def->isInsertSubreg() || Def->isInsertSubregLike()) &&
          "Invalid definition");
-
-  if (Def->getOperand(DefIdx).getSubReg())
-    // If we are composing subreg, bail out.
-    // Same remark as getNextSourceFromRegSequence.
-    // I.e., this may be turned into an assert.
-    return ValueTrackerResult();
+  assert(!Def->getOperand(DefIdx).getSubReg() && "no subreg defs in SSA");
 
   RegSubRegPair BaseReg;
   RegSubRegPairAndIdx InsertedReg;



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