[llvm] 37aad2c - [AMDGPU][NFC] Update premerged test from #129703 to reflect upstream (#130154)

[via llvm-commits]

Author: Janek van Oirschot
Date: 2025-03-06T17:58:23Z
New Revision: 37aad2c1196ea3de242d855cfe38bc25a65d6f5e

URL: https://github.com/llvm/llvm-project/commit/37aad2c1196ea3de242d855cfe38bc25a65d6f5e
DIFF: https://github.com/llvm/llvm-project/commit/37aad2c1196ea3de242d855cfe38bc25a65d6f5e.diff

LOG: [AMDGPU][NFC] Update premerged test from #129703 to reflect upstream (#130154)

Added: 
    

Modified: 
    llvm/test/CodeGen/AMDGPU/masked-load-vectortypes.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/AMDGPU/masked-load-vectortypes.ll b/llvm/test/CodeGen/AMDGPU/masked-load-vectortypes.ll
index c29e8d64a2838..3b855a56a5abb 100644
--- a/llvm/test/CodeGen/AMDGPU/masked-load-vectortypes.ll
+++ b/llvm/test/CodeGen/AMDGPU/masked-load-vectortypes.ll
@@ -216,35 +216,46 @@ define <16 x i8> @uniform_masked_load_ptr1_mask_v16i8(ptr addrspace(1) inreg noc
 ; GFX942:       ; %bb.0: ; %entry
 ; GFX942-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
 ; GFX942-NEXT:    v_and_b32_e32 v0, 1, v0
-; GFX942-NEXT:    v_mov_b32_e32 v16, 0
 ; GFX942-NEXT:    v_cmp_eq_u32_e32 vcc, 1, v0
-; GFX942-NEXT:    v_mov_b32_e32 v17, v16
-; GFX942-NEXT:    v_mov_b32_e32 v18, v16
-; GFX942-NEXT:    v_mov_b32_e32 v19, v16
+; GFX942-NEXT:    v_mov_b32_e32 v15, 0
+; GFX942-NEXT:    v_mov_b32_e32 v16, 0
+; GFX942-NEXT:    v_mov_b32_e32 v1, 0
+; GFX942-NEXT:    v_mov_b32_e32 v2, 0
+; GFX942-NEXT:    v_mov_b32_e32 v3, 0
+; GFX942-NEXT:    v_mov_b32_e32 v17, 0
+; GFX942-NEXT:    v_mov_b32_e32 v5, 0
+; GFX942-NEXT:    v_mov_b32_e32 v6, 0
+; GFX942-NEXT:    v_mov_b32_e32 v7, 0
+; GFX942-NEXT:    v_mov_b32_e32 v18, 0
+; GFX942-NEXT:    v_mov_b32_e32 v9, 0
+; GFX942-NEXT:    v_mov_b32_e32 v10, 0
+; GFX942-NEXT:    v_mov_b32_e32 v11, 0
+; GFX942-NEXT:    v_mov_b32_e32 v19, 0
+; GFX942-NEXT:    v_mov_b32_e32 v13, 0
+; GFX942-NEXT:    v_mov_b32_e32 v14, 0
 ; GFX942-NEXT:    s_and_saveexec_b64 s[2:3], vcc
 ; GFX942-NEXT:    s_cbranch_execz .LBB8_2
 ; GFX942-NEXT:  ; %bb.1: ; %cond.load
-; GFX942-NEXT:    global_load_dwordx4 v[16:19], v16, s[0:1]
-; GFX942-NEXT:  .LBB8_2:
-; GFX942-NEXT:    s_or_b64 exec, exec, s[2:3]
+; GFX942-NEXT:    v_mov_b32_e32 v0, 0
+; GFX942-NEXT:    global_load_dwordx4 v[16:19], v0, s[0:1]
 ; GFX942-NEXT:    s_waitcnt vmcnt(0)
-; GFX942-NEXT:    v_lshrrev_b64 v[20:21], 24, v[16:17]
-; GFX942-NEXT:    v_lshrrev_b64 v[22:23], 24, v[18:19]
-; GFX942-NEXT:    v_lshrrev_b32_e32 v1, 8, v16
-; GFX942-NEXT:    v_lshrrev_b32_e32 v2, 16, v16
-; GFX942-NEXT:    v_lshrrev_b32_e32 v5, 8, v17
-; GFX942-NEXT:    v_lshrrev_b32_e32 v6, 16, v17
-; GFX942-NEXT:    v_lshrrev_b32_e32 v7, 24, v17
-; GFX942-NEXT:    v_lshrrev_b32_e32 v9, 8, v18
-; GFX942-NEXT:    v_lshrrev_b32_e32 v10, 16, v18
-; GFX942-NEXT:    v_lshrrev_b32_e32 v13, 8, v19
-; GFX942-NEXT:    v_lshrrev_b32_e32 v14, 16, v19
 ; GFX942-NEXT:    v_lshrrev_b32_e32 v15, 24, v19
+; GFX942-NEXT:    v_lshrrev_b32_e32 v14, 16, v19
+; GFX942-NEXT:    v_lshrrev_b32_e32 v13, 8, v19
+; GFX942-NEXT:    v_lshrrev_b32_e32 v11, 24, v18
+; GFX942-NEXT:    v_lshrrev_b32_e32 v10, 16, v18
+; GFX942-NEXT:    v_lshrrev_b32_e32 v9, 8, v18
+; GFX942-NEXT:    v_lshrrev_b32_e32 v7, 24, v17
+; GFX942-NEXT:    v_lshrrev_b32_e32 v6, 16, v17
+; GFX942-NEXT:    v_lshrrev_b32_e32 v5, 8, v17
+; GFX942-NEXT:    v_lshrrev_b32_e32 v3, 24, v16
+; GFX942-NEXT:    v_lshrrev_b32_e32 v2, 16, v16
+; GFX942-NEXT:    v_lshrrev_b32_e32 v1, 8, v16
+; GFX942-NEXT:  .LBB8_2:
+; GFX942-NEXT:    s_or_b64 exec, exec, s[2:3]
 ; GFX942-NEXT:    v_mov_b32_e32 v0, v16
-; GFX942-NEXT:    v_mov_b32_e32 v3, v20
 ; GFX942-NEXT:    v_mov_b32_e32 v4, v17
 ; GFX942-NEXT:    v_mov_b32_e32 v8, v18
-; GFX942-NEXT:    v_mov_b32_e32 v11, v22
 ; GFX942-NEXT:    v_mov_b32_e32 v12, v19
 ; GFX942-NEXT:    s_setpc_b64 s[30:31]
 entry: