[llvm] 9ea2da5 - [NFC][LLVM] Refactor llvm/test/CodeGen/AArch64/sve{2}-fcopysign.ll
Paul Walker via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 6 04:54:52 PST 2025
Author: Paul Walker
Date: 2025-03-06T12:53:40Z
New Revision: 9ea2da5758ee96ae7b8b3f914939ea1224af2cde
URL: https://github.com/llvm/llvm-project/commit/9ea2da5758ee96ae7b8b3f914939ea1224af2cde
DIFF: https://github.com/llvm/llvm-project/commit/9ea2da5758ee96ae7b8b3f914939ea1224af2cde.diff
LOG: [NFC][LLVM] Refactor llvm/test/CodeGen/AArch64/sve{2}-fcopysign.ll
Added:
Modified:
llvm/test/CodeGen/AArch64/sve-fcopysign.ll
llvm/test/CodeGen/AArch64/sve2-fcopysign.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AArch64/sve-fcopysign.ll b/llvm/test/CodeGen/AArch64/sve-fcopysign.ll
index 96056db2a4f2d..6f11bf963c1d1 100644
--- a/llvm/test/CodeGen/AArch64/sve-fcopysign.ll
+++ b/llvm/test/CodeGen/AArch64/sve-fcopysign.ll
@@ -1,242 +1,281 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=aarch64 -mattr=+sve -o - | FileCheck %s
-target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
+; RUN: llc -mattr=+sve,+bf16 < %s -o - | FileCheck %s
-;============ v2f32
+target triple = "aarch64-unknown-linux-gnu"
-define <vscale x 2 x float> @test_copysign_v2f32_v2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %b) #0 {
-; CHECK-LABEL: test_copysign_v2f32_v2f32:
-; CHECK: // %bb.0:
-; CHECK-NEXT: and z1.s, z1.s, #0x80000000
-; CHECK-NEXT: and z0.s, z0.s, #0x7fffffff
-; CHECK-NEXT: orr z0.d, z0.d, z1.d
-; CHECK-NEXT: ret
- %r = call <vscale x 2 x float> @llvm.copysign.v2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %b)
- ret <vscale x 2 x float> %r
-}
+;
+; llvm.copysign.nxv2f16
+;
-define <vscale x 2 x float> @test_copysign_v2f32_v2f64(<vscale x 2 x float> %a, <vscale x 2 x double> %b) #0 {
-; CHECK-LABEL: test_copysign_v2f32_v2f64:
+define <vscale x 2 x half> @copysign_nxv2f16_nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x half> %b) {
+; CHECK-LABEL: copysign_nxv2f16_nxv2f16:
; CHECK: // %bb.0:
-; CHECK-NEXT: ptrue p0.d
-; CHECK-NEXT: and z0.s, z0.s, #0x7fffffff
-; CHECK-NEXT: fcvt z1.s, p0/m, z1.d
-; CHECK-NEXT: and z1.s, z1.s, #0x80000000
+; CHECK-NEXT: and z1.h, z1.h, #0x8000
+; CHECK-NEXT: and z0.h, z0.h, #0x7fff
; CHECK-NEXT: orr z0.d, z0.d, z1.d
; CHECK-NEXT: ret
- %tmp0 = fptrunc <vscale x 2 x double> %b to <vscale x 2 x float>
- %r = call <vscale x 2 x float> @llvm.copysign.v2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %tmp0)
- ret <vscale x 2 x float> %r
+ %r = call <vscale x 2 x half> @llvm.copysign.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x half> %b)
+ ret <vscale x 2 x half> %r
}
-declare <vscale x 2 x float> @llvm.copysign.v2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %b) #0
-
-;============ v4f32
-
-define <vscale x 4 x float> @test_copysign_v4f32_v4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %b) #0 {
-; CHECK-LABEL: test_copysign_v4f32_v4f32:
+define <vscale x 2 x half> @copysign_nxv2f16_nxv2f32(<vscale x 2 x half> %a, <vscale x 2 x float> %b) {
+; CHECK-LABEL: copysign_nxv2f16_nxv2f32:
; CHECK: // %bb.0:
-; CHECK-NEXT: and z1.s, z1.s, #0x80000000
-; CHECK-NEXT: and z0.s, z0.s, #0x7fffffff
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: and z0.h, z0.h, #0x7fff
+; CHECK-NEXT: fcvt z1.h, p0/m, z1.s
+; CHECK-NEXT: and z1.h, z1.h, #0x8000
; CHECK-NEXT: orr z0.d, z0.d, z1.d
; CHECK-NEXT: ret
- %r = call <vscale x 4 x float> @llvm.copysign.v4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %b)
- ret <vscale x 4 x float> %r
+ %b.trunc = fptrunc <vscale x 2 x float> %b to <vscale x 2 x half>
+ %r = call <vscale x 2 x half> @llvm.copysign.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x half> %b.trunc)
+ ret <vscale x 2 x half> %r
}
-; SplitVecOp #1
-define <vscale x 4 x float> @test_copysign_v4f32_v4f64(<vscale x 4 x float> %a, <vscale x 4 x double> %b) #0 {
-; CHECK-LABEL: test_copysign_v4f32_v4f64:
+define <vscale x 2 x half> @copysign_nxv2f16_nxv2f64(<vscale x 2 x half> %a, <vscale x 2 x double> %b) {
+; CHECK-LABEL: copysign_nxv2f16_nxv2f64:
; CHECK: // %bb.0:
; CHECK-NEXT: ptrue p0.d
-; CHECK-NEXT: and z0.s, z0.s, #0x7fffffff
-; CHECK-NEXT: fcvt z2.s, p0/m, z2.d
-; CHECK-NEXT: fcvt z1.s, p0/m, z1.d
-; CHECK-NEXT: uzp1 z1.s, z1.s, z2.s
-; CHECK-NEXT: and z1.s, z1.s, #0x80000000
+; CHECK-NEXT: and z0.h, z0.h, #0x7fff
+; CHECK-NEXT: fcvt z1.h, p0/m, z1.d
+; CHECK-NEXT: and z1.h, z1.h, #0x8000
; CHECK-NEXT: orr z0.d, z0.d, z1.d
; CHECK-NEXT: ret
- %tmp0 = fptrunc <vscale x 4 x double> %b to <vscale x 4 x float>
- %r = call <vscale x 4 x float> @llvm.copysign.v4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %tmp0)
- ret <vscale x 4 x float> %r
+ %b.trunc = fptrunc <vscale x 2 x double> %b to <vscale x 2 x half>
+ %r = call <vscale x 2 x half> @llvm.copysign.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x half> %b.trunc)
+ ret <vscale x 2 x half> %r
}
-declare <vscale x 4 x float> @llvm.copysign.v4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %b) #0
+;
+; llvm.copysign.nxv4f16
+;
-;============ v2f64
-
-define <vscale x 2 x double> @test_copysign_v2f64_v232(<vscale x 2 x double> %a, <vscale x 2 x float> %b) #0 {
-; CHECK-LABEL: test_copysign_v2f64_v232:
+define <vscale x 4 x half> @copysign_nxv4f16_nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %b) {
+; CHECK-LABEL: copysign_nxv4f16_nxv4f16:
; CHECK: // %bb.0:
-; CHECK-NEXT: ptrue p0.d
-; CHECK-NEXT: and z0.d, z0.d, #0x7fffffffffffffff
-; CHECK-NEXT: fcvt z1.d, p0/m, z1.s
-; CHECK-NEXT: and z1.d, z1.d, #0x8000000000000000
+; CHECK-NEXT: and z1.h, z1.h, #0x8000
+; CHECK-NEXT: and z0.h, z0.h, #0x7fff
; CHECK-NEXT: orr z0.d, z0.d, z1.d
; CHECK-NEXT: ret
- %tmp0 = fpext <vscale x 2 x float> %b to <vscale x 2 x double>
- %r = call <vscale x 2 x double> @llvm.copysign.v2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %tmp0)
- ret <vscale x 2 x double> %r
+ %r = call <vscale x 4 x half> @llvm.copysign.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %b)
+ ret <vscale x 4 x half> %r
}
-define <vscale x 2 x double> @test_copysign_v2f64_v2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %b) #0 {
-; CHECK-LABEL: test_copysign_v2f64_v2f64:
+define <vscale x 4 x half> @copysign_nxv4f16_nxv4f32(<vscale x 4 x half> %a, <vscale x 4 x float> %b) {
+; CHECK-LABEL: copysign_nxv4f16_nxv4f32:
; CHECK: // %bb.0:
-; CHECK-NEXT: and z1.d, z1.d, #0x8000000000000000
-; CHECK-NEXT: and z0.d, z0.d, #0x7fffffffffffffff
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: and z0.h, z0.h, #0x7fff
+; CHECK-NEXT: fcvt z1.h, p0/m, z1.s
+; CHECK-NEXT: and z1.h, z1.h, #0x8000
; CHECK-NEXT: orr z0.d, z0.d, z1.d
; CHECK-NEXT: ret
- %r = call <vscale x 2 x double> @llvm.copysign.v2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %b)
- ret <vscale x 2 x double> %r
+ %b.trunc = fptrunc <vscale x 4 x float> %b to <vscale x 4 x half>
+ %r = call <vscale x 4 x half> @llvm.copysign.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %b.trunc)
+ ret <vscale x 4 x half> %r
}
-declare <vscale x 2 x double> @llvm.copysign.v2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %b) #0
-
-;============ v4f64
-
-; SplitVecRes mismatched
-define <vscale x 4 x double> @test_copysign_v4f64_v4f32(<vscale x 4 x double> %a, <vscale x 4 x float> %b) #0 {
-; CHECK-LABEL: test_copysign_v4f64_v4f32:
+define <vscale x 4 x half> @copysign_nxv4f16_nxv4f64(<vscale x 4 x half> %a, <vscale x 4 x double> %b) {
+; CHECK-LABEL: copysign_nxv4f16_nxv4f64:
; CHECK: // %bb.0:
-; CHECK-NEXT: uunpklo z3.d, z2.s
-; CHECK-NEXT: uunpkhi z2.d, z2.s
; CHECK-NEXT: ptrue p0.d
-; CHECK-NEXT: and z0.d, z0.d, #0x7fffffffffffffff
-; CHECK-NEXT: and z1.d, z1.d, #0x7fffffffffffffff
-; CHECK-NEXT: fcvt z3.d, p0/m, z3.s
-; CHECK-NEXT: fcvt z2.d, p0/m, z2.s
-; CHECK-NEXT: and z3.d, z3.d, #0x8000000000000000
-; CHECK-NEXT: and z2.d, z2.d, #0x8000000000000000
-; CHECK-NEXT: orr z0.d, z0.d, z3.d
-; CHECK-NEXT: orr z1.d, z1.d, z2.d
-; CHECK-NEXT: ret
- %tmp0 = fpext <vscale x 4 x float> %b to <vscale x 4 x double>
- %r = call <vscale x 4 x double> @llvm.copysign.v4f64(<vscale x 4 x double> %a, <vscale x 4 x double> %tmp0)
- ret <vscale x 4 x double> %r
-}
-
-; SplitVecRes same
-define <vscale x 4 x double> @test_copysign_v4f64_v4f64(<vscale x 4 x double> %a, <vscale x 4 x double> %b) #0 {
-; CHECK-LABEL: test_copysign_v4f64_v4f64:
-; CHECK: // %bb.0:
-; CHECK-NEXT: and z2.d, z2.d, #0x8000000000000000
-; CHECK-NEXT: and z0.d, z0.d, #0x7fffffffffffffff
-; CHECK-NEXT: and z3.d, z3.d, #0x8000000000000000
-; CHECK-NEXT: and z1.d, z1.d, #0x7fffffffffffffff
-; CHECK-NEXT: orr z0.d, z0.d, z2.d
-; CHECK-NEXT: orr z1.d, z1.d, z3.d
+; CHECK-NEXT: and z0.h, z0.h, #0x7fff
+; CHECK-NEXT: fcvt z2.h, p0/m, z2.d
+; CHECK-NEXT: fcvt z1.h, p0/m, z1.d
+; CHECK-NEXT: uzp1 z1.s, z1.s, z2.s
+; CHECK-NEXT: and z1.h, z1.h, #0x8000
+; CHECK-NEXT: orr z0.d, z0.d, z1.d
; CHECK-NEXT: ret
- %r = call <vscale x 4 x double> @llvm.copysign.v4f64(<vscale x 4 x double> %a, <vscale x 4 x double> %b)
- ret <vscale x 4 x double> %r
+ %b.trunc = fptrunc <vscale x 4 x double> %b to <vscale x 4 x half>
+ %r = call <vscale x 4 x half> @llvm.copysign.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %b.trunc)
+ ret <vscale x 4 x half> %r
}
-declare <vscale x 4 x double> @llvm.copysign.v4f64(<vscale x 4 x double> %a, <vscale x 4 x double> %b) #0
-
-;============ v4f16
+;
+; llvm.copysign.nxv8f16
+;
-define <vscale x 4 x half> @test_copysign_v4f16_v4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %b) #0 {
-; CHECK-LABEL: test_copysign_v4f16_v4f16:
+define <vscale x 8 x half> @copysign_nxv8f16_nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %b) {
+; CHECK-LABEL: copysign_nxv8f16_nxv8f16:
; CHECK: // %bb.0:
; CHECK-NEXT: and z1.h, z1.h, #0x8000
; CHECK-NEXT: and z0.h, z0.h, #0x7fff
; CHECK-NEXT: orr z0.d, z0.d, z1.d
; CHECK-NEXT: ret
- %r = call <vscale x 4 x half> @llvm.copysign.v4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %b)
- ret <vscale x 4 x half> %r
+ %r = call <vscale x 8 x half> @llvm.copysign.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %b)
+ ret <vscale x 8 x half> %r
}
-define <vscale x 4 x half> @test_copysign_v4f16_v4f32(<vscale x 4 x half> %a, <vscale x 4 x float> %b) #0 {
-; CHECK-LABEL: test_copysign_v4f16_v4f32:
+define <vscale x 8 x half> @copysign_nxv8f16_nxv8f32(<vscale x 8 x half> %a, <vscale x 8 x float> %b) {
+; CHECK-LABEL: copysign_nxv8f16_nxv8f32:
; CHECK: // %bb.0:
; CHECK-NEXT: ptrue p0.s
; CHECK-NEXT: and z0.h, z0.h, #0x7fff
+; CHECK-NEXT: fcvt z2.h, p0/m, z2.s
; CHECK-NEXT: fcvt z1.h, p0/m, z1.s
+; CHECK-NEXT: uzp1 z1.h, z1.h, z2.h
; CHECK-NEXT: and z1.h, z1.h, #0x8000
; CHECK-NEXT: orr z0.d, z0.d, z1.d
; CHECK-NEXT: ret
- %tmp0 = fptrunc <vscale x 4 x float> %b to <vscale x 4 x half>
- %r = call <vscale x 4 x half> @llvm.copysign.v4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %tmp0)
- ret <vscale x 4 x half> %r
+ %b.trunc = fptrunc <vscale x 8 x float> %b to <vscale x 8 x half>
+ %r = call <vscale x 8 x half> @llvm.copysign.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %b.trunc)
+ ret <vscale x 8 x half> %r
}
-define <vscale x 4 x half> @test_copysign_v4f16_v4f64(<vscale x 4 x half> %a, <vscale x 4 x double> %b) #0 {
-; CHECK-LABEL: test_copysign_v4f16_v4f64:
+define <vscale x 8 x half> @copysign_nxv8f16_nxv8f64(<vscale x 8 x half> %a, <vscale x 8 x double> %b) {
+; CHECK-LABEL: copysign_nxv8f16_nxv8f64:
; CHECK: // %bb.0:
; CHECK-NEXT: ptrue p0.d
; CHECK-NEXT: and z0.h, z0.h, #0x7fff
+; CHECK-NEXT: fcvt z4.h, p0/m, z4.d
+; CHECK-NEXT: fcvt z3.h, p0/m, z3.d
; CHECK-NEXT: fcvt z2.h, p0/m, z2.d
; CHECK-NEXT: fcvt z1.h, p0/m, z1.d
+; CHECK-NEXT: uzp1 z3.s, z3.s, z4.s
; CHECK-NEXT: uzp1 z1.s, z1.s, z2.s
+; CHECK-NEXT: uzp1 z1.h, z1.h, z3.h
; CHECK-NEXT: and z1.h, z1.h, #0x8000
; CHECK-NEXT: orr z0.d, z0.d, z1.d
; CHECK-NEXT: ret
- %tmp0 = fptrunc <vscale x 4 x double> %b to <vscale x 4 x half>
- %r = call <vscale x 4 x half> @llvm.copysign.v4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %tmp0)
- ret <vscale x 4 x half> %r
+ %b.trunc = fptrunc <vscale x 8 x double> %b to <vscale x 8 x half>
+ %r = call <vscale x 8 x half> @llvm.copysign.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %b.trunc)
+ ret <vscale x 8 x half> %r
}
-declare <vscale x 4 x half> @llvm.copysign.v4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %b) #0
+;
+; llvm.copysign.nxv2f32
+;
-;============ v8f16
+define <vscale x 2 x float> @copysign_nxv2f32_nxv2f16(<vscale x 2 x float> %a, <vscale x 2 x half> %b) {
+; CHECK-LABEL: copysign_nxv2f32_nxv2f16:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: and z0.s, z0.s, #0x7fffffff
+; CHECK-NEXT: fcvt z1.s, p0/m, z1.h
+; CHECK-NEXT: and z1.s, z1.s, #0x80000000
+; CHECK-NEXT: orr z0.d, z0.d, z1.d
+; CHECK-NEXT: ret
+ %b.ext = fpext <vscale x 2 x half> %b to <vscale x 2 x float>
+ %r = call <vscale x 2 x float> @llvm.copysign.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %b.ext)
+ ret <vscale x 2 x float> %r
+}
-define <vscale x 8 x half> @test_copysign_v8f16_v8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %b) #0 {
-; CHECK-LABEL: test_copysign_v8f16_v8f16:
+define <vscale x 2 x float> @copysign_nxv2f32_nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %b) {
+; CHECK-LABEL: copysign_nxv2f32_nxv2f32:
; CHECK: // %bb.0:
-; CHECK-NEXT: and z1.h, z1.h, #0x8000
-; CHECK-NEXT: and z0.h, z0.h, #0x7fff
+; CHECK-NEXT: and z1.s, z1.s, #0x80000000
+; CHECK-NEXT: and z0.s, z0.s, #0x7fffffff
; CHECK-NEXT: orr z0.d, z0.d, z1.d
; CHECK-NEXT: ret
- %r = call <vscale x 8 x half> @llvm.copysign.v8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %b)
- ret <vscale x 8 x half> %r
+ %r = call <vscale x 2 x float> @llvm.copysign.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %b)
+ ret <vscale x 2 x float> %r
}
-define <vscale x 8 x half> @test_copysign_v8f16_v8f32(<vscale x 8 x half> %a, <vscale x 8 x float> %b) #0 {
-; CHECK-LABEL: test_copysign_v8f16_v8f32:
+define <vscale x 2 x float> @copysign_nxv2f32_nxv2f64(<vscale x 2 x float> %a, <vscale x 2 x double> %b) {
+; CHECK-LABEL: copysign_nxv2f32_nxv2f64:
; CHECK: // %bb.0:
-; CHECK-NEXT: ptrue p0.s
-; CHECK-NEXT: and z0.h, z0.h, #0x7fff
-; CHECK-NEXT: fcvt z2.h, p0/m, z2.s
-; CHECK-NEXT: fcvt z1.h, p0/m, z1.s
-; CHECK-NEXT: uzp1 z1.h, z1.h, z2.h
-; CHECK-NEXT: and z1.h, z1.h, #0x8000
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: and z0.s, z0.s, #0x7fffffff
+; CHECK-NEXT: fcvt z1.s, p0/m, z1.d
+; CHECK-NEXT: and z1.s, z1.s, #0x80000000
; CHECK-NEXT: orr z0.d, z0.d, z1.d
; CHECK-NEXT: ret
- %tmp0 = fptrunc <vscale x 8 x float> %b to <vscale x 8 x half>
- %r = call <vscale x 8 x half> @llvm.copysign.v8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %tmp0)
- ret <vscale x 8 x half> %r
+ %b.trunc = fptrunc <vscale x 2 x double> %b to <vscale x 2 x float>
+ %r = call <vscale x 2 x float> @llvm.copysign.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %b.trunc)
+ ret <vscale x 2 x float> %r
}
+;
+; llvm.copysign.nxv4f32
+;
-;========== FCOPYSIGN_EXTEND_ROUND
+define <vscale x 4 x float> @copysign_nxv4f32_nxv4f16(<vscale x 4 x float> %a, <vscale x 4 x half> %b) {
+; CHECK-LABEL: copysign_nxv4f32_nxv4f16:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: and z0.s, z0.s, #0x7fffffff
+; CHECK-NEXT: fcvt z1.s, p0/m, z1.h
+; CHECK-NEXT: and z1.s, z1.s, #0x80000000
+; CHECK-NEXT: orr z0.d, z0.d, z1.d
+; CHECK-NEXT: ret
+ %b.ext = fpext <vscale x 4 x half> %b to <vscale x 4 x float>
+ %r = call <vscale x 4 x float> @llvm.copysign.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %b.ext)
+ ret <vscale x 4 x float> %r
+}
-define <vscale x 4 x half> @test_copysign_nxv4f32_nxv4f16(<vscale x 4 x float> %a, <vscale x 4 x float> %b) #0 {
-; CHECK-LABEL: test_copysign_nxv4f32_nxv4f16:
+define <vscale x 4 x float> @copysign_nxv4f32_nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %b) {
+; CHECK-LABEL: copysign_nxv4f32_nxv4f32:
; CHECK: // %bb.0:
; CHECK-NEXT: and z1.s, z1.s, #0x80000000
; CHECK-NEXT: and z0.s, z0.s, #0x7fffffff
-; CHECK-NEXT: ptrue p0.s
; CHECK-NEXT: orr z0.d, z0.d, z1.d
-; CHECK-NEXT: fcvt z0.h, p0/m, z0.s
; CHECK-NEXT: ret
- %t1 = call <vscale x 4 x float> @llvm.copysign.v4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %b)
- %t2 = fptrunc <vscale x 4 x float> %t1 to <vscale x 4 x half>
- ret <vscale x 4 x half> %t2
+ %r = call <vscale x 4 x float> @llvm.copysign.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %b)
+ ret <vscale x 4 x float> %r
}
-define <vscale x 2 x float> @test_copysign_nxv2f64_nxv2f32(<vscale x 2 x double> %a, <vscale x 2 x double> %b) #0 {
-; CHECK-LABEL: test_copysign_nxv2f64_nxv2f32:
+define <vscale x 4 x float> @copysign_nxv4f32_nxv4f64(<vscale x 4 x float> %a, <vscale x 4 x double> %b) {
+; CHECK-LABEL: copysign_nxv4f32_nxv4f64:
; CHECK: // %bb.0:
-; CHECK-NEXT: and z1.d, z1.d, #0x8000000000000000
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: and z0.s, z0.s, #0x7fffffff
+; CHECK-NEXT: fcvt z2.s, p0/m, z2.d
+; CHECK-NEXT: fcvt z1.s, p0/m, z1.d
+; CHECK-NEXT: uzp1 z1.s, z1.s, z2.s
+; CHECK-NEXT: and z1.s, z1.s, #0x80000000
+; CHECK-NEXT: orr z0.d, z0.d, z1.d
+; CHECK-NEXT: ret
+ %b.trunc = fptrunc <vscale x 4 x double> %b to <vscale x 4 x float>
+ %r = call <vscale x 4 x float> @llvm.copysign.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %b.trunc)
+ ret <vscale x 4 x float> %r
+}
+
+;
+; llvm.copysign.nxv2f64
+;
+
+define <vscale x 2 x double> @copysign_nxv2f64_nxv2f16(<vscale x 2 x double> %a, <vscale x 2 x half> %b) {
+; CHECK-LABEL: copysign_nxv2f64_nxv2f16:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
; CHECK-NEXT: and z0.d, z0.d, #0x7fffffffffffffff
+; CHECK-NEXT: fcvt z1.d, p0/m, z1.h
+; CHECK-NEXT: and z1.d, z1.d, #0x8000000000000000
+; CHECK-NEXT: orr z0.d, z0.d, z1.d
+; CHECK-NEXT: ret
+ %b.ext = fpext <vscale x 2 x half> %b to <vscale x 2 x double>
+ %r = call <vscale x 2 x double> @llvm.copysign.nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %b.ext)
+ ret <vscale x 2 x double> %r
+}
+
+define <vscale x 2 x double> @copysign_nxv2f64_nxv2f32(<vscale x 2 x double> %a, <vscale x 2 x float> %b) {
+; CHECK-LABEL: copysign_nxv2f64_nxv2f32:
+; CHECK: // %bb.0:
; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: and z0.d, z0.d, #0x7fffffffffffffff
+; CHECK-NEXT: fcvt z1.d, p0/m, z1.s
+; CHECK-NEXT: and z1.d, z1.d, #0x8000000000000000
; CHECK-NEXT: orr z0.d, z0.d, z1.d
-; CHECK-NEXT: fcvt z0.s, p0/m, z0.d
; CHECK-NEXT: ret
- %t1 = call <vscale x 2 x double> @llvm.copysign.v2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %b)
- %t2 = fptrunc <vscale x 2 x double> %t1 to <vscale x 2 x float>
- ret <vscale x 2 x float> %t2
+ %b.ext = fpext <vscale x 2 x float> %b to <vscale x 2 x double>
+ %r = call <vscale x 2 x double> @llvm.copysign.nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %b.ext)
+ ret <vscale x 2 x double> %r
}
-declare <vscale x 8 x half> @llvm.copysign.v8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %b) #0
+define <vscale x 2 x double> @copysign_nxv2f64_nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %b) {
+; CHECK-LABEL: copysign_nxv2f64_nxv2f64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: and z1.d, z1.d, #0x8000000000000000
+; CHECK-NEXT: and z0.d, z0.d, #0x7fffffffffffffff
+; CHECK-NEXT: orr z0.d, z0.d, z1.d
+; CHECK-NEXT: ret
+ %r = call <vscale x 2 x double> @llvm.copysign.nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %b)
+ ret <vscale x 2 x double> %r
+}
-attributes #0 = { nounwind }
+declare <vscale x 2 x half> @llvm.copysign.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x half> %b)
+declare <vscale x 4 x half> @llvm.copysign.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %b)
+declare <vscale x 8 x half> @llvm.copysign.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %b)
+declare <vscale x 2 x float> @llvm.copysign.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %b)
+declare <vscale x 4 x float> @llvm.copysign.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %b)
+declare <vscale x 2 x double> @llvm.copysign.nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %b)
diff --git a/llvm/test/CodeGen/AArch64/sve2-fcopysign.ll b/llvm/test/CodeGen/AArch64/sve2-fcopysign.ll
index a7fa9e7575df6..624e4ef03f440 100644
--- a/llvm/test/CodeGen/AArch64/sve2-fcopysign.ll
+++ b/llvm/test/CodeGen/AArch64/sve2-fcopysign.ll
@@ -1,195 +1,263 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=aarch64 -mattr=+sve2 -o - | FileCheck %s
+; RUN: llc -mattr=+sve2,+bf16 < %s -o - | FileCheck %s
-target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
+target triple = "aarch64-unknown-linux-gnu"
-;============ v2f32
+;
+; llvm.copysign.nxv2f16
+;
-define <vscale x 2 x float> @test_copysign_v2f32_v2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %b) #0 {
-; CHECK-LABEL: test_copysign_v2f32_v2f32:
+define <vscale x 2 x half> @copysign_nxv2f16_nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x half> %b) {
+; CHECK-LABEL: copysign_nxv2f16_nxv2f16:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov z2.s, #0x7fffffff
+; CHECK-NEXT: mov z2.h, #32767 // =0x7fff
; CHECK-NEXT: bsl z0.d, z0.d, z1.d, z2.d
; CHECK-NEXT: ret
- %r = call <vscale x 2 x float> @llvm.copysign.v2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %b)
- ret <vscale x 2 x float> %r
+ %r = call <vscale x 2 x half> @llvm.copysign.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x half> %b)
+ ret <vscale x 2 x half> %r
}
-define <vscale x 2 x float> @test_copysign_v2f32_v2f64(<vscale x 2 x float> %a, <vscale x 2 x double> %b) #0 {
-; CHECK-LABEL: test_copysign_v2f32_v2f64:
+define <vscale x 2 x half> @copysign_nxv2f16_nxv2f32(<vscale x 2 x half> %a, <vscale x 2 x float> %b) {
+; CHECK-LABEL: copysign_nxv2f16_nxv2f32:
; CHECK: // %bb.0:
; CHECK-NEXT: ptrue p0.d
-; CHECK-NEXT: mov z2.s, #0x7fffffff
-; CHECK-NEXT: fcvt z1.s, p0/m, z1.d
+; CHECK-NEXT: mov z2.h, #32767 // =0x7fff
+; CHECK-NEXT: fcvt z1.h, p0/m, z1.s
; CHECK-NEXT: bsl z0.d, z0.d, z1.d, z2.d
; CHECK-NEXT: ret
- %tmp0 = fptrunc <vscale x 2 x double> %b to <vscale x 2 x float>
- %r = call <vscale x 2 x float> @llvm.copysign.v2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %tmp0)
- ret <vscale x 2 x float> %r
+ %b.trunc = fptrunc <vscale x 2 x float> %b to <vscale x 2 x half>
+ %r = call <vscale x 2 x half> @llvm.copysign.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x half> %b.trunc)
+ ret <vscale x 2 x half> %r
+}
+
+define <vscale x 2 x half> @copysign_nxv2f16_nxv2f64(<vscale x 2 x half> %a, <vscale x 2 x double> %b) {
+; CHECK-LABEL: copysign_nxv2f16_nxv2f64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: mov z2.h, #32767 // =0x7fff
+; CHECK-NEXT: fcvt z1.h, p0/m, z1.d
+; CHECK-NEXT: bsl z0.d, z0.d, z1.d, z2.d
+; CHECK-NEXT: ret
+ %b.trunc = fptrunc <vscale x 2 x double> %b to <vscale x 2 x half>
+ %r = call <vscale x 2 x half> @llvm.copysign.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x half> %b.trunc)
+ ret <vscale x 2 x half> %r
}
-declare <vscale x 2 x float> @llvm.copysign.v2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %b) #0
+;
+; llvm.copysign.nxv4f16
+;
-;============ v4f32
+define <vscale x 4 x half> @copysign_nxv4f16_nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %b) {
+; CHECK-LABEL: copysign_nxv4f16_nxv4f16:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov z2.h, #32767 // =0x7fff
+; CHECK-NEXT: bsl z0.d, z0.d, z1.d, z2.d
+; CHECK-NEXT: ret
+ %r = call <vscale x 4 x half> @llvm.copysign.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %b)
+ ret <vscale x 4 x half> %r
+}
-define <vscale x 4 x float> @test_copysign_v4f32_v4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %b) #0 {
-; CHECK-LABEL: test_copysign_v4f32_v4f32:
+define <vscale x 4 x half> @copysign_nxv4f16_nxv4f32(<vscale x 4 x half> %a, <vscale x 4 x float> %b) {
+; CHECK-LABEL: copysign_nxv4f16_nxv4f32:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov z2.s, #0x7fffffff
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: mov z2.h, #32767 // =0x7fff
+; CHECK-NEXT: fcvt z1.h, p0/m, z1.s
; CHECK-NEXT: bsl z0.d, z0.d, z1.d, z2.d
; CHECK-NEXT: ret
- %r = call <vscale x 4 x float> @llvm.copysign.v4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %b)
- ret <vscale x 4 x float> %r
+ %b.trunc = fptrunc <vscale x 4 x float> %b to <vscale x 4 x half>
+ %r = call <vscale x 4 x half> @llvm.copysign.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %b.trunc)
+ ret <vscale x 4 x half> %r
}
-; SplitVecOp #1
-define <vscale x 4 x float> @test_copysign_v4f32_v4f64(<vscale x 4 x float> %a, <vscale x 4 x double> %b) #0 {
-; CHECK-LABEL: test_copysign_v4f32_v4f64:
+define <vscale x 4 x half> @copysign_nxv4f16_nxv4f64(<vscale x 4 x half> %a, <vscale x 4 x double> %b) {
+; CHECK-LABEL: copysign_nxv4f16_nxv4f64:
; CHECK: // %bb.0:
; CHECK-NEXT: ptrue p0.d
-; CHECK-NEXT: mov z3.s, #0x7fffffff
-; CHECK-NEXT: fcvt z2.s, p0/m, z2.d
-; CHECK-NEXT: fcvt z1.s, p0/m, z1.d
+; CHECK-NEXT: mov z3.h, #32767 // =0x7fff
+; CHECK-NEXT: fcvt z2.h, p0/m, z2.d
+; CHECK-NEXT: fcvt z1.h, p0/m, z1.d
; CHECK-NEXT: uzp1 z1.s, z1.s, z2.s
; CHECK-NEXT: bsl z0.d, z0.d, z1.d, z3.d
; CHECK-NEXT: ret
- %tmp0 = fptrunc <vscale x 4 x double> %b to <vscale x 4 x float>
- %r = call <vscale x 4 x float> @llvm.copysign.v4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %tmp0)
- ret <vscale x 4 x float> %r
+ %b.trunc = fptrunc <vscale x 4 x double> %b to <vscale x 4 x half>
+ %r = call <vscale x 4 x half> @llvm.copysign.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %b.trunc)
+ ret <vscale x 4 x half> %r
}
-declare <vscale x 4 x float> @llvm.copysign.v4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %b) #0
+;
+; llvm.copysign.nxv8f16
+;
-;============ v2f64
-
-define <vscale x 2 x double> @test_copysign_v2f64_v232(<vscale x 2 x double> %a, <vscale x 2 x float> %b) #0 {
-; CHECK-LABEL: test_copysign_v2f64_v232:
+define <vscale x 8 x half> @copysign_nxv8f16_nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %b) {
+; CHECK-LABEL: copysign_nxv8f16_nxv8f16:
; CHECK: // %bb.0:
-; CHECK-NEXT: ptrue p0.d
-; CHECK-NEXT: mov z2.d, #0x7fffffffffffffff
-; CHECK-NEXT: fcvt z1.d, p0/m, z1.s
+; CHECK-NEXT: mov z2.h, #32767 // =0x7fff
; CHECK-NEXT: bsl z0.d, z0.d, z1.d, z2.d
; CHECK-NEXT: ret
- %tmp0 = fpext <vscale x 2 x float> %b to <vscale x 2 x double>
- %r = call <vscale x 2 x double> @llvm.copysign.v2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %tmp0)
- ret <vscale x 2 x double> %r
+ %r = call <vscale x 8 x half> @llvm.copysign.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %b)
+ ret <vscale x 8 x half> %r
}
-define <vscale x 2 x double> @test_copysign_v2f64_v2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %b) #0 {
-; CHECK-LABEL: test_copysign_v2f64_v2f64:
+define <vscale x 8 x half> @copysign_nxv8f16_nxv8f32(<vscale x 8 x half> %a, <vscale x 8 x float> %b) {
+; CHECK-LABEL: copysign_nxv8f16_nxv8f32:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov z2.d, #0x7fffffffffffffff
-; CHECK-NEXT: bsl z0.d, z0.d, z1.d, z2.d
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: mov z3.h, #32767 // =0x7fff
+; CHECK-NEXT: fcvt z2.h, p0/m, z2.s
+; CHECK-NEXT: fcvt z1.h, p0/m, z1.s
+; CHECK-NEXT: uzp1 z1.h, z1.h, z2.h
+; CHECK-NEXT: bsl z0.d, z0.d, z1.d, z3.d
; CHECK-NEXT: ret
- %r = call <vscale x 2 x double> @llvm.copysign.v2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %b)
- ret <vscale x 2 x double> %r
+ %b.trunc = fptrunc <vscale x 8 x float> %b to <vscale x 8 x half>
+ %r = call <vscale x 8 x half> @llvm.copysign.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %b.trunc)
+ ret <vscale x 8 x half> %r
}
-declare <vscale x 2 x double> @llvm.copysign.v2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %b) #0
+define <vscale x 8 x half> @copysign_nxv8f16_nxv8f64(<vscale x 8 x half> %a, <vscale x 8 x double> %b) {
+; CHECK-LABEL: copysign_nxv8f16_nxv8f64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fcvt z4.h, p0/m, z4.d
+; CHECK-NEXT: fcvt z3.h, p0/m, z3.d
+; CHECK-NEXT: fcvt z2.h, p0/m, z2.d
+; CHECK-NEXT: fcvt z1.h, p0/m, z1.d
+; CHECK-NEXT: uzp1 z3.s, z3.s, z4.s
+; CHECK-NEXT: uzp1 z1.s, z1.s, z2.s
+; CHECK-NEXT: mov z2.h, #32767 // =0x7fff
+; CHECK-NEXT: uzp1 z1.h, z1.h, z3.h
+; CHECK-NEXT: bsl z0.d, z0.d, z1.d, z2.d
+; CHECK-NEXT: ret
+ %b.trunc = fptrunc <vscale x 8 x double> %b to <vscale x 8 x half>
+ %r = call <vscale x 8 x half> @llvm.copysign.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %b.trunc)
+ ret <vscale x 8 x half> %r
+}
-;============ v4f64
+;
+; llvm.copysign.nxv2f32
+;
-; SplitVecRes mismatched
-define <vscale x 4 x double> @test_copysign_v4f64_v4f32(<vscale x 4 x double> %a, <vscale x 4 x float> %b) #0 {
-; CHECK-LABEL: test_copysign_v4f64_v4f32:
+define <vscale x 2 x float> @copysign_nxv2f32_nxv2f16(<vscale x 2 x float> %a, <vscale x 2 x half> %b) {
+; CHECK-LABEL: copysign_nxv2f32_nxv2f16:
; CHECK: // %bb.0:
-; CHECK-NEXT: uunpkhi z3.d, z2.s
-; CHECK-NEXT: uunpklo z2.d, z2.s
; CHECK-NEXT: ptrue p0.d
-; CHECK-NEXT: mov z4.d, #0x7fffffffffffffff
-; CHECK-NEXT: fcvt z3.d, p0/m, z3.s
-; CHECK-NEXT: fcvt z2.d, p0/m, z2.s
-; CHECK-NEXT: bsl z0.d, z0.d, z2.d, z4.d
-; CHECK-NEXT: bsl z1.d, z1.d, z3.d, z4.d
+; CHECK-NEXT: mov z2.s, #0x7fffffff
+; CHECK-NEXT: fcvt z1.s, p0/m, z1.h
+; CHECK-NEXT: bsl z0.d, z0.d, z1.d, z2.d
; CHECK-NEXT: ret
- %tmp0 = fpext <vscale x 4 x float> %b to <vscale x 4 x double>
- %r = call <vscale x 4 x double> @llvm.copysign.v4f64(<vscale x 4 x double> %a, <vscale x 4 x double> %tmp0)
- ret <vscale x 4 x double> %r
+ %b.ext = fpext <vscale x 2 x half> %b to <vscale x 2 x float>
+ %r = call <vscale x 2 x float> @llvm.copysign.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %b.ext)
+ ret <vscale x 2 x float> %r
}
-; SplitVecRes same
-define <vscale x 4 x double> @test_copysign_v4f64_v4f64(<vscale x 4 x double> %a, <vscale x 4 x double> %b) #0 {
-; CHECK-LABEL: test_copysign_v4f64_v4f64:
+define <vscale x 2 x float> @copysign_nxv2f32_nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %b) {
+; CHECK-LABEL: copysign_nxv2f32_nxv2f32:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov z4.d, #0x7fffffffffffffff
-; CHECK-NEXT: bsl z0.d, z0.d, z2.d, z4.d
-; CHECK-NEXT: bsl z1.d, z1.d, z3.d, z4.d
+; CHECK-NEXT: mov z2.s, #0x7fffffff
+; CHECK-NEXT: bsl z0.d, z0.d, z1.d, z2.d
; CHECK-NEXT: ret
- %r = call <vscale x 4 x double> @llvm.copysign.v4f64(<vscale x 4 x double> %a, <vscale x 4 x double> %b)
- ret <vscale x 4 x double> %r
+ %r = call <vscale x 2 x float> @llvm.copysign.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %b)
+ ret <vscale x 2 x float> %r
}
-declare <vscale x 4 x double> @llvm.copysign.v4f64(<vscale x 4 x double> %a, <vscale x 4 x double> %b) #0
+define <vscale x 2 x float> @copysign_nxv2f32_nxv2f64(<vscale x 2 x float> %a, <vscale x 2 x double> %b) {
+; CHECK-LABEL: copysign_nxv2f32_nxv2f64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: mov z2.s, #0x7fffffff
+; CHECK-NEXT: fcvt z1.s, p0/m, z1.d
+; CHECK-NEXT: bsl z0.d, z0.d, z1.d, z2.d
+; CHECK-NEXT: ret
+ %b.trunc = fptrunc <vscale x 2 x double> %b to <vscale x 2 x float>
+ %r = call <vscale x 2 x float> @llvm.copysign.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %b.trunc)
+ ret <vscale x 2 x float> %r
+}
-;============ v4f16
+;
+; llvm.copysign.nxv4f32
+;
-define <vscale x 4 x half> @test_copysign_v4f16_v4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %b) #0 {
-; CHECK-LABEL: test_copysign_v4f16_v4f16:
+define <vscale x 4 x float> @copysign_nxv4f32_nxv4f16(<vscale x 4 x float> %a, <vscale x 4 x half> %b) {
+; CHECK-LABEL: copysign_nxv4f32_nxv4f16:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov z2.h, #32767 // =0x7fff
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: mov z2.s, #0x7fffffff
+; CHECK-NEXT: fcvt z1.s, p0/m, z1.h
; CHECK-NEXT: bsl z0.d, z0.d, z1.d, z2.d
; CHECK-NEXT: ret
- %r = call <vscale x 4 x half> @llvm.copysign.v4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %b)
- ret <vscale x 4 x half> %r
+ %b.ext = fpext <vscale x 4 x half> %b to <vscale x 4 x float>
+ %r = call <vscale x 4 x float> @llvm.copysign.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %b.ext)
+ ret <vscale x 4 x float> %r
}
-define <vscale x 4 x half> @test_copysign_v4f16_v4f32(<vscale x 4 x half> %a, <vscale x 4 x float> %b) #0 {
-; CHECK-LABEL: test_copysign_v4f16_v4f32:
+define <vscale x 4 x float> @copysign_nxv4f32_nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %b) {
+; CHECK-LABEL: copysign_nxv4f32_nxv4f32:
; CHECK: // %bb.0:
-; CHECK-NEXT: ptrue p0.s
-; CHECK-NEXT: mov z2.h, #32767 // =0x7fff
-; CHECK-NEXT: fcvt z1.h, p0/m, z1.s
+; CHECK-NEXT: mov z2.s, #0x7fffffff
; CHECK-NEXT: bsl z0.d, z0.d, z1.d, z2.d
; CHECK-NEXT: ret
- %tmp0 = fptrunc <vscale x 4 x float> %b to <vscale x 4 x half>
- %r = call <vscale x 4 x half> @llvm.copysign.v4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %tmp0)
- ret <vscale x 4 x half> %r
+ %r = call <vscale x 4 x float> @llvm.copysign.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %b)
+ ret <vscale x 4 x float> %r
}
-define <vscale x 4 x half> @test_copysign_v4f16_v4f64(<vscale x 4 x half> %a, <vscale x 4 x double> %b) #0 {
-; CHECK-LABEL: test_copysign_v4f16_v4f64:
+define <vscale x 4 x float> @copysign_nxv4f32_nxv4f64(<vscale x 4 x float> %a, <vscale x 4 x double> %b) {
+; CHECK-LABEL: copysign_nxv4f32_nxv4f64:
; CHECK: // %bb.0:
; CHECK-NEXT: ptrue p0.d
-; CHECK-NEXT: mov z3.h, #32767 // =0x7fff
-; CHECK-NEXT: fcvt z2.h, p0/m, z2.d
-; CHECK-NEXT: fcvt z1.h, p0/m, z1.d
+; CHECK-NEXT: mov z3.s, #0x7fffffff
+; CHECK-NEXT: fcvt z2.s, p0/m, z2.d
+; CHECK-NEXT: fcvt z1.s, p0/m, z1.d
; CHECK-NEXT: uzp1 z1.s, z1.s, z2.s
; CHECK-NEXT: bsl z0.d, z0.d, z1.d, z3.d
; CHECK-NEXT: ret
- %tmp0 = fptrunc <vscale x 4 x double> %b to <vscale x 4 x half>
- %r = call <vscale x 4 x half> @llvm.copysign.v4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %tmp0)
- ret <vscale x 4 x half> %r
+ %b.trunc = fptrunc <vscale x 4 x double> %b to <vscale x 4 x float>
+ %r = call <vscale x 4 x float> @llvm.copysign.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %b.trunc)
+ ret <vscale x 4 x float> %r
}
-declare <vscale x 4 x half> @llvm.copysign.v4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %b) #0
+;
+; llvm.copysign.nxv2f64
+;
-;============ v8f16
-
-define <vscale x 8 x half> @test_copysign_v8f16_v8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %b) #0 {
-; CHECK-LABEL: test_copysign_v8f16_v8f16:
+define <vscale x 2 x double> @copysign_nxv2f64_nxv2f16(<vscale x 2 x double> %a, <vscale x 2 x half> %b) {
+; CHECK-LABEL: copysign_nxv2f64_nxv2f16:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov z2.h, #32767 // =0x7fff
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: mov z2.d, #0x7fffffffffffffff
+; CHECK-NEXT: fcvt z1.d, p0/m, z1.h
; CHECK-NEXT: bsl z0.d, z0.d, z1.d, z2.d
; CHECK-NEXT: ret
- %r = call <vscale x 8 x half> @llvm.copysign.v8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %b)
- ret <vscale x 8 x half> %r
+ %b.ext = fpext <vscale x 2 x half> %b to <vscale x 2 x double>
+ %r = call <vscale x 2 x double> @llvm.copysign.nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %b.ext)
+ ret <vscale x 2 x double> %r
}
-define <vscale x 8 x half> @test_copysign_v8f16_v8f32(<vscale x 8 x half> %a, <vscale x 8 x float> %b) #0 {
-; CHECK-LABEL: test_copysign_v8f16_v8f32:
+define <vscale x 2 x double> @copysign_nxv2f64_nxv2f32(<vscale x 2 x double> %a, <vscale x 2 x float> %b) {
+; CHECK-LABEL: copysign_nxv2f64_nxv2f32:
; CHECK: // %bb.0:
-; CHECK-NEXT: ptrue p0.s
-; CHECK-NEXT: mov z3.h, #32767 // =0x7fff
-; CHECK-NEXT: fcvt z2.h, p0/m, z2.s
-; CHECK-NEXT: fcvt z1.h, p0/m, z1.s
-; CHECK-NEXT: uzp1 z1.h, z1.h, z2.h
-; CHECK-NEXT: bsl z0.d, z0.d, z1.d, z3.d
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: mov z2.d, #0x7fffffffffffffff
+; CHECK-NEXT: fcvt z1.d, p0/m, z1.s
+; CHECK-NEXT: bsl z0.d, z0.d, z1.d, z2.d
; CHECK-NEXT: ret
- %tmp0 = fptrunc <vscale x 8 x float> %b to <vscale x 8 x half>
- %r = call <vscale x 8 x half> @llvm.copysign.v8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %tmp0)
- ret <vscale x 8 x half> %r
+ %b.ext = fpext <vscale x 2 x float> %b to <vscale x 2 x double>
+ %r = call <vscale x 2 x double> @llvm.copysign.nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %b.ext)
+ ret <vscale x 2 x double> %r
}
-declare <vscale x 8 x half> @llvm.copysign.v8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %b) #0
+define <vscale x 2 x double> @copysign_nxv2f64_nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %b) {
+; CHECK-LABEL: copysign_nxv2f64_nxv2f64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov z2.d, #0x7fffffffffffffff
+; CHECK-NEXT: bsl z0.d, z0.d, z1.d, z2.d
+; CHECK-NEXT: ret
+ %r = call <vscale x 2 x double> @llvm.copysign.nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %b)
+ ret <vscale x 2 x double> %r
+}
-attributes #0 = { nounwind }
+declare <vscale x 2 x half> @llvm.copysign.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x half> %b)
+declare <vscale x 4 x half> @llvm.copysign.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %b)
+declare <vscale x 8 x half> @llvm.copysign.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %b)
+declare <vscale x 2 x float> @llvm.copysign.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %b)
+declare <vscale x 4 x float> @llvm.copysign.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %b)
+declare <vscale x 2 x double> @llvm.copysign.nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %b)
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