[llvm] Adding support in llvm-exegesis for Aarch64 for handling FPR64/128, PPR16 and ZPR128 reg class. (PR #127564)

[Sjoerd Meijer via llvm-commits]

sjoerdmeijer wrote:

I haven't checked, but I suspect that e.g. this run command tries to execute and run llvm-exegesis:

    llvm-exegesis -mcpu=neoverse-v2 -mode=latency --dump-object-to-disk=%d --opcode-name=FADDV_VPZ_D 

But we don't want or need to run it, I think, we just want to prepare the snippet. Can you check if we achieve that with:

     --benchmark-phase=assemble-measured-code

or some other value to this option.

https://github.com/llvm/llvm-project/pull/127564