[llvm] [Xtensa] Implement Xtensa MAC16 Option. (PR #130004)

[Matt Arsenault via llvm-commits]

================
@@ -73,8 +73,50 @@ static DecodeStatus DecodeARRegisterClass(MCInst &Inst, uint64_t RegNo,
   return MCDisassembler::Success;
 }
 
+static const unsigned MRDecoderTable[] = {Xtensa::M0, Xtensa::M1, Xtensa::M2,
----------------
arsenm wrote:

MCPhysReg 

https://github.com/llvm/llvm-project/pull/130004