[llvm] [llvm] Implement address sanitizer on AIX (2/3) (PR #129926)

[Vitaly Buka via llvm-commits]

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@@ -1326,7 +1340,11 @@ static bool isUnsupportedAMDGPUAddrspace(Value *Addr) {
 
 Value *AddressSanitizer::memToShadow(Value *Shadow, IRBuilder<> &IRB) {
   // Shadow >> scale
-  Shadow = IRB.CreateLShr(Shadow, Mapping.Scale);
+  if (TargetTriple.isOSAIX() && TargetTriple.getArch() == Triple::ppc64)
+    Shadow = IRB.CreateLShr(IRB.CreateShl(Shadow, Mapping.HighBits),
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vitalybuka wrote:

Will ShadowBase has HighBits set?
It possible to avoid that so you don't need to diverge from default implementation?


https://github.com/llvm/llvm-project/pull/129926