[llvm] [SPIR-V] Add support for inline SPIR-V types (PR #125316)

[Cassandra Beckley via llvm-commits]

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@@ -1406,6 +1406,28 @@ SPIRVType *SPIRVGlobalRegistry::getOrCreateOpTypeByOpcode(
   return SpirvTy;
 }
 
+SPIRVType *SPIRVGlobalRegistry::getOrCreateUnknownType(
+    const Type *Ty, MachineIRBuilder &MIRBuilder, unsigned Opcode,
+    const ArrayRef<MCOperand> Operands) {
+  Register ResVReg = DT.find(Ty, &MIRBuilder.getMF());
+  if (ResVReg.isValid())
+    return MIRBuilder.getMF().getRegInfo().getUniqueVRegDef(ResVReg);
+  ResVReg = createTypeVReg(MIRBuilder);
+
+  MachineInstrBuilder MIB =
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cassiebeckley wrote:

Done.

https://github.com/llvm/llvm-project/pull/125316