[llvm] [PowerPC] Add intrinsics and tests for basic Dense Math enablement instructions (PR #129913)

via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 5 11:04:23 PST 2025


https://github.com/RolandF77 created https://github.com/llvm/llvm-project/pull/129913

Add intrinsics and tests for Dense Math basic enablement instructions dmsetdmrz, dmmr, dmxor.

>From cd3606902144d367503db089607664099e4e1918 Mon Sep 17 00:00:00 2001
From: Roland Froese <froese at ca.ibm.com>
Date: Wed, 5 Mar 2025 19:16:12 +0000
Subject: [PATCH] dense math enablement

---
 llvm/include/llvm/IR/IntrinsicsPowerPC.td    | 10 ++++++++++
 llvm/lib/Target/PowerPC/PPCInstrFutureMMA.td |  9 ++++++---
 2 files changed, 16 insertions(+), 3 deletions(-)

diff --git a/llvm/include/llvm/IR/IntrinsicsPowerPC.td b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
index 6f49ed39d8a09..af66b8206182e 100644
--- a/llvm/include/llvm/IR/IntrinsicsPowerPC.td
+++ b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
@@ -1644,6 +1644,16 @@ let TargetPrefix = "ppc" in {
   def int_ppc_mma_xxsetaccz :
       DefaultAttrsIntrinsic<[llvm_v512i1_ty], [], [IntrNoMem]>;
 
+  def int_ppc_mma_dmsetdmrz :
+      DefaultAttrsIntrinsic<[llvm_v1024i1_ty], [], [IntrNoMem]>;
+
+  def int_ppc_mma_dmmr :
+      DefaultAttrsIntrinsic<[llvm_v1024i1_ty], [llvm_v1024i1_ty], [IntrNoMem]>;
+
+  def int_ppc_mma_dmxor :
+      DefaultAttrsIntrinsic<[llvm_v1024i1_ty], [llvm_v1024i1_ty,
+                             llvm_v1024i1_ty], [IntrNoMem]>;
+
   // MMA Reduced-Precision: Outer Product Intrinsic Definitions.
   defm int_ppc_mma_xvi4ger8 :
         PowerPC_MMA_ACC_PP_Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty]>;
diff --git a/llvm/lib/Target/PowerPC/PPCInstrFutureMMA.td b/llvm/lib/Target/PowerPC/PPCInstrFutureMMA.td
index 4da2969857d55..b7100462cb967 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrFutureMMA.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrFutureMMA.td
@@ -105,12 +105,15 @@ let Predicates = [IsISAFuture] in {
                                             "dmxxinstfdmr256 $AT, $XBp, $P", []>;
 
   def DMMR : XForm_ATB3<31, 6, 177, (outs dmr:$AT), (ins dmr:$AB),
-                        "dmmr $AT, $AB", []>;
+                        "dmmr $AT, $AB", 
+                        [(set v1024i1:$AT, (int_ppc_mma_dmmr v1024i1:$AB))]>;
 
   def DMXOR : XForm_ATB3<31, 7, 177, (outs dmr:$AT), (ins dmr:$ATi, dmr:$AB),
-                         "dmxor $AT, $AB", []>,
+                         "dmxor $AT, $AB",
+                         [(set v1024i1:$AT, (int_ppc_mma_dmxor v1024i1:$ATi, v1024i1:$AB))]>,
                          RegConstraint<"$ATi = $AT">, NoEncode<"$ATi">;
 
   def DMSETDMRZ : XForm_AT3<31, 2, 177, (outs dmr:$AT), (ins),
-                            "dmsetdmrz $AT", NoItinerary, []>;
+                            "dmsetdmrz $AT", NoItinerary,
+                            [(set v1024i1:$AT, (int_ppc_mma_dmsetdmrz))]>;
 }



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