[llvm] Addition of @llvm.lround.* and @llvm.llround.* intrinsic (PR #129240)

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``````````bash
git-clang-format --diff 89e7f4d31b2673fd3bfaf065f930ca9139d92e10 4f9065f4f29853ece039a439a616efa7251d24e3 --extensions cpp -- llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
``````````

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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
index b3805f8322..f1881603ac 100644
--- a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
@@ -286,7 +286,7 @@ private:
                               MachineInstr &I, CL::OpenCLExtInst CLInst,
                               GL::GLSLExtInst GLInst) const;
   bool selectExtInstForLRound(Register ResVReg, const SPIRVType *ResType,
-                              MachineInstr &I, 
+                              MachineInstr &I,
                               const ExtInstList &ExtInsts) const;
 
   bool selectLog10(Register ResVReg, const SPIRVType *ResType,
@@ -628,21 +628,25 @@ bool SPIRVInstructionSelector::spvSelect(Register ResVReg,
     return selectSUCmp(ResVReg, ResType, I, true);
   case TargetOpcode::G_UCMP:
     return selectSUCmp(ResVReg, ResType, I, false);
-  case TargetOpcode::G_LROUND: 
-  case TargetOpcode::G_LLROUND:{
-      Register regForLround = MRI->createVirtualRegister(MRI -> getRegClass(ResVReg), "lround");
-      MRI->setRegClass(regForLround,&SPIRV::iIDRegClass);
-      GR.assignSPIRVTypeToVReg(GR.getSPIRVTypeForVReg(I.getOperand(1).getReg()), regForLround, *(I.getParent() -> getParent()));
-      bool isRounded = selectExtInstForLRound(regForLround, GR.getSPIRVTypeForVReg(regForLround), I, CL::round, GL::Round);
-      if(isRounded){
-        MachineBasicBlock &BB = *I.getParent();
-        MachineFunction &MF = *BB.getParent();
-        auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpConvertFToS))
-                      .addDef(ResVReg)
-                      .addUse(GR.getSPIRVTypeID(ResType))  
-                      .addUse(regForLround);
+  case TargetOpcode::G_LROUND:
+  case TargetOpcode::G_LLROUND: {
+    Register regForLround =
+        MRI->createVirtualRegister(MRI->getRegClass(ResVReg), "lround");
+    MRI->setRegClass(regForLround, &SPIRV::iIDRegClass);
+    GR.assignSPIRVTypeToVReg(GR.getSPIRVTypeForVReg(I.getOperand(1).getReg()),
+                             regForLround, *(I.getParent()->getParent()));
+    bool isRounded = selectExtInstForLRound(
+        regForLround, GR.getSPIRVTypeForVReg(regForLround), I, CL::round,
+        GL::Round);
+    if (isRounded) {
+      MachineBasicBlock &BB = *I.getParent();
+      MachineFunction &MF = *BB.getParent();
+      auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpConvertFToS))
+                     .addDef(ResVReg)
+                     .addUse(GR.getSPIRVTypeID(ResType))
+                     .addUse(regForLround);
       return MIB.constrainAllUses(TII, TRI, RBI);
-      }
+    }
   }
   case TargetOpcode::G_STRICT_FMA:
   case TargetOpcode::G_FMA:
@@ -982,22 +986,17 @@ bool SPIRVInstructionSelector::selectExtInst(Register ResVReg,
   }
   return false;
 }
-bool SPIRVInstructionSelector::selectExtInstForLRound(Register ResVReg,
-                                             const SPIRVType *ResType,
-                                             MachineInstr &I,
-                                             CL::OpenCLExtInst CLInst,
-                                             GL::GLSLExtInst GLInst) 
-                                             const {
+bool SPIRVInstructionSelector::selectExtInstForLRound(
+    Register ResVReg, const SPIRVType *ResType, MachineInstr &I,
+    CL::OpenCLExtInst CLInst, GL::GLSLExtInst GLInst) const {
   ExtInstList ExtInsts = {{SPIRV::InstructionSet::OpenCL_std, CLInst},
                           {SPIRV::InstructionSet::GLSL_std_450, GLInst}};
   return selectExtInstForLRound(ResVReg, ResType, I, ExtInsts);
 }
 
-bool SPIRVInstructionSelector::selectExtInstForLRound(Register ResVReg,
-                                             const SPIRVType *ResType,
-                                             MachineInstr &I,
-                                             const ExtInstList &Insts) 
-                                             const {
+bool SPIRVInstructionSelector::selectExtInstForLRound(
+    Register ResVReg, const SPIRVType *ResType, MachineInstr &I,
+    const ExtInstList &Insts) const {
 
   for (const auto &Ex : Insts) {
     SPIRV::InstructionSet::InstructionSet Set = Ex.first;
@@ -1024,7 +1023,6 @@ bool SPIRVInstructionSelector::selectExtInstForLRound(Register ResVReg,
   return false;
 }
 
-
 bool SPIRVInstructionSelector::selectOpWithSrcs(Register ResVReg,
                                                 const SPIRVType *ResType,
                                                 MachineInstr &I,
diff --git a/llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp b/llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
index 6bce01309c..cb9c8b8d8a 100644
--- a/llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
@@ -305,8 +305,9 @@ SPIRVLegalizerInfo::SPIRVLegalizerInfo(const SPIRVSubtarget &ST) {
       {G_UADDO, G_SADDO, G_USUBO, G_SSUBO, G_UMULO, G_SMULO})
       .alwaysLegal();
 
-    getActionDefinitionsBuilder({G_LROUND, G_LLROUND})
-    .legalForCartesianProduct(allFloatScalarsAndVectors, allIntScalarsAndVectors);
+  getActionDefinitionsBuilder({G_LROUND, G_LLROUND})
+      .legalForCartesianProduct(allFloatScalarsAndVectors,
+                                allIntScalarsAndVectors);
 
   // FP conversions.
   getActionDefinitionsBuilder({G_FPTRUNC, G_FPEXT})

``````````

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https://github.com/llvm/llvm-project/pull/129240