[llvm] [MachineCopyPropagation] Recognise and delete no-op moves produced after forwarded uses (PR #129889)
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Wed Mar 5 06:53:05 PST 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-regalloc
@llvm/pr-subscribers-llvm-globalisel
Author: Alex Bradbury (asb)
<details>
<summary>Changes</summary>
This changes removes 189 static instances of no-op reg-reg moves (i.e. where src == dest) across llvm-test-suite when compiled for RISC-V rv64gc and with SPEC included.
---
I think this is a reasonable way to handle this case, but it's possible I'm missing an alternate approach. `isNopCopy` is attractively named, but it is focused on removing cases where a copy is made redundant by a previous copy, rather than the case covered here of a copy that is literally a no-op (src == dst).
---
Full diff: https://github.com/llvm/llvm-project/pull/129889.diff
5 Files Affected:
- (modified) llvm/lib/CodeGen/MachineCopyPropagation.cpp (+11)
- (modified) llvm/test/CodeGen/RISCV/GlobalISel/constbarrier-rv32.ll (-1)
- (modified) llvm/test/CodeGen/RISCV/GlobalISel/constbarrier-rv64.ll (-1)
- (added) llvm/test/CodeGen/RISCV/machine-copyprop-noop-removal.mir (+74)
- (modified) llvm/test/CodeGen/RISCV/sextw-removal.ll (-1)
``````````diff
diff --git a/llvm/lib/CodeGen/MachineCopyPropagation.cpp b/llvm/lib/CodeGen/MachineCopyPropagation.cpp
index 1105b8c15515f..9bc0f5836f33a 100644
--- a/llvm/lib/CodeGen/MachineCopyPropagation.cpp
+++ b/llvm/lib/CodeGen/MachineCopyPropagation.cpp
@@ -971,6 +971,17 @@ void MachineCopyPropagation::ForwardCopyPropagateBlock(MachineBasicBlock &MBB) {
forwardUses(MI);
+ // It's possible that the previous transformation has resulted in a no-op
+ // register move (i.e. one where source and destination registers are the
+ // same). If so, delete it.
+ CopyOperands = isCopyInstr(MI, *TII, UseCopyInstr);
+ if (CopyOperands && CopyOperands->Source->getReg() == CopyOperands->Destination->getReg()) {
+ MI.eraseFromParent();
+ NumDeletes++;
+ Changed = true;
+ continue;
+ }
+
// Not a copy.
SmallVector<Register, 4> Defs;
const MachineOperand *RegMask = nullptr;
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/constbarrier-rv32.ll b/llvm/test/CodeGen/RISCV/GlobalISel/constbarrier-rv32.ll
index 2fcb911c2654a..309ebf71127c4 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/constbarrier-rv32.ll
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/constbarrier-rv32.ll
@@ -38,7 +38,6 @@ define void @constant_fold_barrier_i128(ptr %p) {
; RV32-NEXT: seqz a7, a6
; RV32-NEXT: and a1, a7, a1
; RV32-NEXT: add a7, a4, zero
-; RV32-NEXT: add a5, a5, zero
; RV32-NEXT: sltu a4, a4, a4
; RV32-NEXT: or a1, a3, a1
; RV32-NEXT: add a7, a7, a1
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/constbarrier-rv64.ll b/llvm/test/CodeGen/RISCV/GlobalISel/constbarrier-rv64.ll
index 2c3e3faddc391..8e4c0376ad0a5 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/constbarrier-rv64.ll
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/constbarrier-rv64.ll
@@ -26,7 +26,6 @@ define i128 @constant_fold_barrier_i128(i128 %x) {
; RV64-NEXT: and a0, a0, a2
; RV64-NEXT: add a0, a0, a2
; RV64-NEXT: sltu a2, a0, a2
-; RV64-NEXT: add a1, a1, zero
; RV64-NEXT: add a1, a1, a2
; RV64-NEXT: ret
entry:
diff --git a/llvm/test/CodeGen/RISCV/machine-copyprop-noop-removal.mir b/llvm/test/CodeGen/RISCV/machine-copyprop-noop-removal.mir
new file mode 100644
index 0000000000000..d739537b50d05
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/machine-copyprop-noop-removal.mir
@@ -0,0 +1,74 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
+# RUN: llc -o - %s -mtriple=riscv64 -run-pass=machine-cp -mcp-use-is-copy-instr | FileCheck %s
+
+## This test was added to capture a case where MachineCopyPropagation risks
+## leaving a no-op register move (add, x0, reg).
+
+---
+name: ham
+body: |
+ ; CHECK-LABEL: name: ham
+ ; CHECK: bb.0:
+ ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.3(0x40000000)
+ ; CHECK-NEXT: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: renamable $x11 = ANDI killed renamable $x10, 1
+ ; CHECK-NEXT: renamable $x10 = ADDI $x0, 1
+ ; CHECK-NEXT: BEQ killed renamable $x11, $x0, %bb.3
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.1:
+ ; CHECK-NEXT: successors: %bb.4(0x40000000), %bb.2(0x40000000)
+ ; CHECK-NEXT: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: $x11 = ADDI $x0, 0
+ ; CHECK-NEXT: BEQ renamable $x10, $x0, %bb.4
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.2:
+ ; CHECK-NEXT: $x10 = ADDI $x0, 0
+ ; CHECK-NEXT: PseudoRET implicit $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.3:
+ ; CHECK-NEXT: successors: %bb.4(0x40000000), %bb.2(0x40000000)
+ ; CHECK-NEXT: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: renamable $x11 = ADDI $x0, 1
+ ; CHECK-NEXT: renamable $x10 = ADD killed renamable $x11, killed renamable $x10
+ ; CHECK-NEXT: BNE renamable $x10, $x0, %bb.2
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.4:
+ ; CHECK-NEXT: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: PseudoRET implicit $x10
+ bb.0:
+ successors: %bb.1(0x40000000), %bb.2(0x40000000)
+ liveins: $x10
+
+ renamable $x11 = ANDI killed renamable $x10, 1
+ renamable $x10 = ADDI $x0, 1
+ BEQ killed renamable $x11, $x0, %bb.2
+
+ bb.1:
+ successors: %bb.4(0x40000000), %bb.5(0x40000000)
+ liveins: $x10
+
+ $x11 = ADDI $x0, 0
+ renamable $x10 = ADD killed renamable $x11, killed renamable $x10
+ BEQ renamable $x10, $x0, %bb.4
+
+ bb.5:
+ $x10 = ADDI $x0, 0
+ PseudoRET implicit $x10
+
+ bb.2:
+ successors: %bb.4(0x40000000), %bb.5(0x40000000)
+ liveins: $x10
+
+ renamable $x11 = ADDI $x0, 1
+ renamable $x10 = ADD killed renamable $x11, killed renamable $x10
+ BNE renamable $x10, $x0, %bb.5
+
+ bb.4:
+ liveins: $x10
+
+ PseudoRET implicit $x10
+...
diff --git a/llvm/test/CodeGen/RISCV/sextw-removal.ll b/llvm/test/CodeGen/RISCV/sextw-removal.ll
index e0a16aa05cd00..49494608eee4d 100644
--- a/llvm/test/CodeGen/RISCV/sextw-removal.ll
+++ b/llvm/test/CodeGen/RISCV/sextw-removal.ll
@@ -1352,7 +1352,6 @@ define signext i32 @sextw_sh2add(i1 zeroext %0, ptr %1, i32 signext %2, i32 sign
; NOREMOVAL-LABEL: sextw_sh2add:
; NOREMOVAL: # %bb.0:
; NOREMOVAL-NEXT: sh2add a2, a2, a3
-; NOREMOVAL-NEXT: mv a2, a2
; NOREMOVAL-NEXT: beqz a0, .LBB22_2
; NOREMOVAL-NEXT: # %bb.1:
; NOREMOVAL-NEXT: sw a2, 0(a1)
``````````
</details>
https://github.com/llvm/llvm-project/pull/129889
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