[llvm] [AMDGPU][CodeGen] Utilized MBB's liveIn check in SILowerSGPRSpills (PR #129848)

[Vikash Gupta via llvm-commits]

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@@ -177,6 +179,10 @@ class MachineBasicBlock
   using LiveInVector = std::vector<RegisterMaskPair>;
   LiveInVector LiveIns;
 
+  /// Keeps track of live register units for those physical registers which
+  /// are livein of the basicblock.
+  BitVector LiveInRegUnits;
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vg0204 wrote:

1. If we want MBB's isLiveIn to work as it's supposed to than LiveInRegUnits is needed. 
2. As for about fixing SILoweSGPRSpills patch, its not related to downstream use fix. It was hidden uptil now as due to use of implicit and implicit-def of suprregs. It got found while I was developing the solution to get rid of implicit keywords usage
3. So, this fix is important stepping stone towards my solution related to http://ontrack-internal.amd.com/browse/SWDEV-498533

https://github.com/llvm/llvm-project/pull/129848