[llvm] c8583e8 - [Xtensa] Fix build (NFC)

[Nikita Popov via llvm-commits]

Author: Nikita Popov
Date: 2025-03-05T12:37:18+01:00
New Revision: c8583e8f388d092637c159c9a25b8abc70b1ca41

URL: https://github.com/llvm/llvm-project/commit/c8583e8f388d092637c159c9a25b8abc70b1ca41
DIFF: https://github.com/llvm/llvm-project/commit/c8583e8f388d092637c159c9a25b8abc70b1ca41.diff

LOG: [Xtensa] Fix build (NFC)

Added: 
    

Modified: 
    llvm/lib/Target/Xtensa/XtensaFrameLowering.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/Xtensa/XtensaFrameLowering.cpp b/llvm/lib/Target/Xtensa/XtensaFrameLowering.cpp
index 7ff6ff81bc28e..d09aac613f623 100644
--- a/llvm/lib/Target/Xtensa/XtensaFrameLowering.cpp
+++ b/llvm/lib/Target/Xtensa/XtensaFrameLowering.cpp
@@ -83,8 +83,8 @@ void XtensaFrameLowering::emitPrologue(MachineFunction &MF,
       if (MBBI->getOpcode() == TargetOpcode::COPY && Info.isSpilledToReg()) {
         Register DstReg = MBBI->getOperand(0).getReg();
         Register Reg = MBBI->getOperand(1).getReg();
-        IsStoreInst =
-            Info.getDstReg() == DstReg && Info.getReg() == Reg.asMCReg();
+        IsStoreInst = Info.getDstReg() == DstReg.asMCReg() &&
+                      Info.getReg() == Reg.asMCReg();
       } else {
         Register Reg = TII.isStoreToStackSlot(*MBBI, StoreFI);
         IsStoreInst = Reg.asMCReg() == Info.getReg() && StoreFI == FI;
@@ -169,8 +169,8 @@ void XtensaFrameLowering::emitEpilogue(MachineFunction &MF,
       if (I->getOpcode() == TargetOpcode::COPY && Info.isSpilledToReg()) {
         Register Reg = I->getOperand(0).getReg();
         Register DstReg = I->getOperand(1).getReg();
-        IsRestoreInst =
-            Info.getDstReg() == DstReg && Info.getReg() == Reg.asMCReg();
+        IsRestoreInst = Info.getDstReg() == DstReg.asMCReg() &&
+                        Info.getReg() == Reg.asMCReg();
       } else {
         Register Reg = TII.isLoadFromStackSlot(*I, LoadFI);
         IsRestoreInst = Info.getReg() == Reg.asMCReg() && LoadFI == FI;