[llvm] [NVPTX] Add intrinsics for st.bulk instruction (PR #128856)

Durgadoss R via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 5 02:17:24 PST 2025


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@@ -1407,6 +1407,38 @@ The last argument `i1 %unpack` is a compile-time constant which when set, indica
 For more information, refer to the
 `PTX ISA <https://docs.nvidia.com/cuda/parallel-thread-execution/#tcgen05-instructions-tcgen05-st>`__.
 
+Store Intrinsics
+----------------
+
+'``llvm.nvvm.st.bulk.*``'
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
----------------
durga4github wrote:

Please align this length...

https://github.com/llvm/llvm-project/pull/128856


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