[llvm] 77cf6ec - [AMDGPU] Don't store an immediate in a Register. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2025-03-04T22:17:17-08:00
New Revision: 77cf6ecf785871ea051116eb8f40062914bcb06f

URL: https://github.com/llvm/llvm-project/commit/77cf6ecf785871ea051116eb8f40062914bcb06f
DIFF: https://github.com/llvm/llvm-project/commit/77cf6ecf785871ea051116eb8f40062914bcb06f.diff

LOG: [AMDGPU] Don't store an immediate in a Register. NFC

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
index 740e52fb87dc2..664b181153340 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -5498,8 +5498,8 @@ bool AMDGPULegalizerInfo::legalizeLaneOp(LegalizerHelper &Helper,
     case Intrinsic::amdgcn_permlane16:
     case Intrinsic::amdgcn_permlanex16: {
       Register Src3 = MI.getOperand(5).getReg();
-      Register Src4 = MI.getOperand(6).getImm();
-      Register Src5 = MI.getOperand(7).getImm();
+      int64_t Src4 = MI.getOperand(6).getImm();
+      int64_t Src5 = MI.getOperand(7).getImm();
       return LaneOp.addUse(Src1)
           .addUse(Src2)
           .addUse(Src3)