[llvm] efb966e - [MIRParser] Use Register::id(). Pass Twine by reference. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2025-03-04T22:02:58-08:00
New Revision: efb966e9295cdee8178591ae9d81e4b76dd138db

URL: https://github.com/llvm/llvm-project/commit/efb966e9295cdee8178591ae9d81e4b76dd138db
DIFF: https://github.com/llvm/llvm-project/commit/efb966e9295cdee8178591ae9d81e4b76dd138db.diff

LOG: [MIRParser] Use Register::id(). Pass Twine by reference. NFC

Added: 
    

Modified: 
    llvm/lib/CodeGen/MIRParser/MIRParser.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
index 7a47a26a21615..b195683051c90 100644
--- a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
@@ -767,7 +767,7 @@ bool MIRParserImpl::setupRegisterInfo(const PerFunctionMIParsingState &PFS,
 
   bool Error = false;
   // Create VRegs
-  auto populateVRegInfo = [&](const VRegInfo &Info, Twine Name) {
+  auto populateVRegInfo = [&](const VRegInfo &Info, const Twine &Name) {
     Register Reg = Info.VReg;
     switch (Info.Kind) {
     case VRegInfo::UNKNOWN:
@@ -803,7 +803,7 @@ bool MIRParserImpl::setupRegisterInfo(const PerFunctionMIParsingState &PFS,
 
   for (auto P : PFS.VRegInfos) {
     const VRegInfo &Info = *P.second;
-    populateVRegInfo(Info, Twine(P.first));
+    populateVRegInfo(Info, Twine(P.first.id()));
   }
 
   // Compute MachineRegisterInfo::UsedPhysRegMask