[llvm] 41e58b6 - [SLP][NFC]Add a test for 2 spilled vector values spilled in diamond shaped control flow
Alexey Bataev via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 3 11:33:42 PST 2025
Author: Alexey Bataev
Date: 2025-03-03T11:33:33-08:00
New Revision: 41e58b6737ee8b5fbd019fb6a6986d94c5f40566
URL: https://github.com/llvm/llvm-project/commit/41e58b6737ee8b5fbd019fb6a6986d94c5f40566
DIFF: https://github.com/llvm/llvm-project/commit/41e58b6737ee8b5fbd019fb6a6986d94c5f40566.diff
LOG: [SLP][NFC]Add a test for 2 spilled vector values spilled in diamond shaped control flow
Added:
Modified:
llvm/test/Transforms/SLPVectorizer/RISCV/spillcost.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/SLPVectorizer/RISCV/spillcost.ll b/llvm/test/Transforms/SLPVectorizer/RISCV/spillcost.ll
index b0c25bc4cc1f2..5649c557e2f54 100644
--- a/llvm/test/Transforms/SLPVectorizer/RISCV/spillcost.ll
+++ b/llvm/test/Transforms/SLPVectorizer/RISCV/spillcost.ll
@@ -45,7 +45,7 @@ baz:
ret void
}
-; Shouldn't be vectorized
+; Should be vectorized - just one spill of TMP0
define void @f1(i1 %c, ptr %p, ptr %q, ptr %r) {
; CHECK-LABEL: define void @f1(
; CHECK-SAME: i1 [[C:%.*]], ptr [[P:%.*]], ptr [[Q:%.*]], ptr [[R:%.*]]) #[[ATTR0]] {
@@ -89,6 +89,50 @@ baz:
ret void
}
+; Shouldn't be vectorized
+define void @f11(i1 %c, ptr %p, ptr %q, ptr %r) {
+; CHECK-LABEL: define void @f11(
+; CHECK-SAME: i1 [[C:%.*]], ptr [[P:%.*]], ptr [[Q:%.*]], ptr [[R:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, ptr [[P]], align 8
+; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i64> [[TMP0]], splat (i64 1)
+; CHECK-NEXT: br i1 [[C]], label %[[FOO:.*]], label %[[BAR:.*]]
+; CHECK: [[FOO]]:
+; CHECK-NEXT: br label %[[BAZ:.*]]
+; CHECK: [[BAR]]:
+; CHECK-NEXT: call void @g()
+; CHECK-NEXT: call void @g()
+; CHECK-NEXT: call void @g()
+; CHECK-NEXT: br label %[[BAZ]]
+; CHECK: [[BAZ]]:
+; CHECK-NEXT: [[TMP2:%.*]] = phi <2 x i64> [ [[TMP1]], %[[FOO]] ], [ [[TMP0]], %[[BAR]] ]
+; CHECK-NEXT: store <2 x i64> [[TMP2]], ptr [[Q]], align 8
+; CHECK-NEXT: ret void
+;
+entry:
+ %x0 = load i64, ptr %p
+ %p1 = getelementptr i64, ptr %p, i64 1
+ %x1 = load i64, ptr %p1
+ %y0 = add i64 %x0, 1
+ %y1 = add i64 %x1, 1
+ br i1 %c, label %foo, label %bar
+foo:
+ br label %baz
+bar:
+ call void @g()
+ call void @g()
+ call void @g()
+ br label %baz
+baz:
+ %phi0 = phi i64 [%y0, %foo], [%x0, %bar]
+ %phi1 = phi i64 [%y1, %foo], [%x1, %bar]
+ store i64 %phi0, ptr %q
+ %q1 = getelementptr i64, ptr %q, i64 1
+ store i64 %phi1, ptr %q1
+
+ ret void
+}
+
; Should be vectorized
define void @f2(i1 %c, ptr %p, ptr %q, ptr %r) {
; CHECK-LABEL: define void @f2(
More information about the llvm-commits
mailing list