[llvm] cb113a7 - RegisterCoalescer: Avoid repeated getRegClass on all paths (#129490)

[via llvm-commits]

Author: Matt Arsenault
Date: 2025-03-03T16:05:54+07:00
New Revision: cb113a78126ad54109738c298794ff2293a47b37

URL: https://github.com/llvm/llvm-project/commit/cb113a78126ad54109738c298794ff2293a47b37
DIFF: https://github.com/llvm/llvm-project/commit/cb113a78126ad54109738c298794ff2293a47b37.diff

LOG: RegisterCoalescer: Avoid repeated getRegClass on all paths (#129490)

Added: 
    

Modified: 
    llvm/lib/CodeGen/RegisterCoalescer.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/RegisterCoalescer.cpp b/llvm/lib/CodeGen/RegisterCoalescer.cpp
index 586f723d70b44..74606e66d4e4b 100644
--- a/llvm/lib/CodeGen/RegisterCoalescer.cpp
+++ b/llvm/lib/CodeGen/RegisterCoalescer.cpp
@@ -478,6 +478,7 @@ bool CoalescerPair::setRegisters(const MachineInstr *MI) {
   }
 
   const MachineRegisterInfo &MRI = MI->getMF()->getRegInfo();
+  const TargetRegisterClass *SrcRC = MRI.getRegClass(Src);
 
   if (Dst.isPhysical()) {
     // Eliminate DstSub on a physreg.
@@ -490,15 +491,14 @@ bool CoalescerPair::setRegisters(const MachineInstr *MI) {
 
     // Eliminate SrcSub by picking a corresponding Dst superregister.
     if (SrcSub) {
-      Dst = TRI.getMatchingSuperReg(Dst, SrcSub, MRI.getRegClass(Src));
+      Dst = TRI.getMatchingSuperReg(Dst, SrcSub, SrcRC);
       if (!Dst)
         return false;
-    } else if (!MRI.getRegClass(Src)->contains(Dst)) {
+    } else if (!SrcRC->contains(Dst)) {
       return false;
     }
   } else {
     // Both registers are virtual.
-    const TargetRegisterClass *SrcRC = MRI.getRegClass(Src);
     const TargetRegisterClass *DstRC = MRI.getRegClass(Dst);
 
     // Both registers have subreg indices.