[llvm] 7cee4c7 - [CallingConvLower] Use MCRegister. NFC

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Sun Mar 2 23:48:15 PST 2025


Author: Craig Topper
Date: 2025-03-02T23:46:18-08:00
New Revision: 7cee4c7c59fdbb28fb7b502ea39da521b1e634a2

URL: https://github.com/llvm/llvm-project/commit/7cee4c7c59fdbb28fb7b502ea39da521b1e634a2
DIFF: https://github.com/llvm/llvm-project/commit/7cee4c7c59fdbb28fb7b502ea39da521b1e634a2.diff

LOG: [CallingConvLower] Use MCRegister. NFC

Added: 
    

Modified: 
    llvm/include/llvm/CodeGen/CallingConvLower.h
    llvm/lib/CodeGen/CallingConvLower.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/include/llvm/CodeGen/CallingConvLower.h b/llvm/include/llvm/CodeGen/CallingConvLower.h
index 7ad27cd01336a..9739c2427d7a7 100644
--- a/llvm/include/llvm/CodeGen/CallingConvLower.h
+++ b/llvm/include/llvm/CodeGen/CallingConvLower.h
@@ -493,7 +493,7 @@ class CCState {
   /// the given value type. This is useful when varargs are passed in the
   /// registers that normal prototyped parameters would be passed in, or for
   /// implementing perfect forwarding.
-  void getRemainingRegParmsForType(SmallVectorImpl<MCPhysReg> &Regs, MVT VT,
+  void getRemainingRegParmsForType(SmallVectorImpl<MCRegister> &Regs, MVT VT,
                                    CCAssignFn Fn);
 
   /// Compute the set of registers that need to be preserved and forwarded to

diff  --git a/llvm/lib/CodeGen/CallingConvLower.cpp b/llvm/lib/CodeGen/CallingConvLower.cpp
index cebc9f5c4639d..b71e7812296cc 100644
--- a/llvm/lib/CodeGen/CallingConvLower.cpp
+++ b/llvm/lib/CodeGen/CallingConvLower.cpp
@@ -198,7 +198,7 @@ static bool isValueTypeInRegForCC(CallingConv::ID CC, MVT VT) {
   return (CC == CallingConv::X86_VectorCall || CC == CallingConv::X86_FastCall);
 }
 
-void CCState::getRemainingRegParmsForType(SmallVectorImpl<MCPhysReg> &Regs,
+void CCState::getRemainingRegParmsForType(SmallVectorImpl<MCRegister> &Regs,
                                           MVT VT, CCAssignFn Fn) {
   uint64_t SavedStackSize = StackSize;
   Align SavedMaxStackArgAlign = MaxStackArgAlign;
@@ -227,7 +227,7 @@ void CCState::getRemainingRegParmsForType(SmallVectorImpl<MCPhysReg> &Regs,
   assert(NumLocs < Locs.size() && "CC assignment failed to add location");
   for (unsigned I = NumLocs, E = Locs.size(); I != E; ++I)
     if (Locs[I].isRegLoc())
-      Regs.push_back(MCPhysReg(Locs[I].getLocReg()));
+      Regs.push_back(Locs[I].getLocReg());
 
   // Clear the assigned values and stack memory. We leave the registers marked
   // as allocated so that future queries don't return the same registers, i.e.
@@ -247,11 +247,11 @@ void CCState::analyzeMustTailForwardedRegisters(
   SaveAndRestore SavedMustTail(AnalyzingMustTailForwardedRegs, true);
 
   for (MVT RegVT : RegParmTypes) {
-    SmallVector<MCPhysReg, 8> RemainingRegs;
+    SmallVector<MCRegister, 8> RemainingRegs;
     getRemainingRegParmsForType(RemainingRegs, RegVT, Fn);
     const TargetLowering *TL = MF.getSubtarget().getTargetLowering();
     const TargetRegisterClass *RC = TL->getRegClassFor(RegVT);
-    for (MCPhysReg PReg : RemainingRegs) {
+    for (MCRegister PReg : RemainingRegs) {
       Register VReg = MF.addLiveIn(PReg, RC);
       Forwards.push_back(ForwardedRegister(VReg, PReg, RegVT));
     }


        


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