[llvm] b356a30 - [Mips] Format some MCTargetDesc files. NFC
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Sat Mar 1 10:16:08 PST 2025
Author: Fangrui Song
Date: 2025-03-01T10:16:02-08:00
New Revision: b356a3085be43fda14a9f34f9e81bdf36b73e915
URL: https://github.com/llvm/llvm-project/commit/b356a3085be43fda14a9f34f9e81bdf36b73e915
DIFF: https://github.com/llvm/llvm-project/commit/b356a3085be43fda14a9f34f9e81bdf36b73e915.diff
LOG: [Mips] Format some MCTargetDesc files. NFC
In preparation for #127581
Added:
Modified:
llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
llvm/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h
llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h
Removed:
################################################################################
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
index 4af6768b13cc9..c7def8bea697d 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
@@ -351,10 +351,11 @@ std::optional<MCFixupKind> MipsAsmBackend::getFixupKind(StringRef Name) const {
const MCFixupKindInfo &MipsAsmBackend::
getFixupKindInfo(MCFixupKind Kind) const {
const static MCFixupKindInfo LittleEndianInfos[] = {
- // This table *must* be in same the order of fixup_* kinds in
- // MipsFixupKinds.h.
- //
- // name offset bits flags
+ // This table *must* be in same the order of fixup_* kinds in
+ // MipsFixupKinds.h.
+ //
+ // name offset bits flags
+ // clang-format off
{ "fixup_Mips_16", 0, 16, 0 },
{ "fixup_Mips_32", 0, 32, 0 },
{ "fixup_Mips_REL32", 0, 32, 0 },
@@ -424,16 +425,18 @@ getFixupKindInfo(MCFixupKind Kind) const {
{ "fixup_Mips_SUB", 0, 64, 0 },
{ "fixup_MICROMIPS_SUB", 0, 64, 0 },
{ "fixup_Mips_JALR", 0, 32, 0 },
- { "fixup_MICROMIPS_JALR", 0, 32, 0 }
+ { "fixup_MICROMIPS_JALR", 0, 32, 0 },
+ // clang-format on
};
static_assert(std::size(LittleEndianInfos) == Mips::NumTargetFixupKinds,
"Not all MIPS little endian fixup kinds added!");
const static MCFixupKindInfo BigEndianInfos[] = {
- // This table *must* be in same the order of fixup_* kinds in
- // MipsFixupKinds.h.
- //
- // name offset bits flags
+ // This table *must* be in same the order of fixup_* kinds in
+ // MipsFixupKinds.h.
+ //
+ // name offset bits flags
+ // clang-format off
{ "fixup_Mips_16", 16, 16, 0 },
{ "fixup_Mips_32", 0, 32, 0 },
{ "fixup_Mips_REL32", 0, 32, 0 },
@@ -503,7 +506,8 @@ getFixupKindInfo(MCFixupKind Kind) const {
{ "fixup_Mips_SUB", 0, 64, 0 },
{ "fixup_MICROMIPS_SUB", 0, 64, 0 },
{ "fixup_Mips_JALR", 0, 32, 0 },
- { "fixup_MICROMIPS_JALR", 0, 32, 0 }
+ { "fixup_MICROMIPS_JALR", 0, 32, 0 },
+ // clang-format on
};
static_assert(std::size(BigEndianInfos) == Mips::NumTargetFixupKinds,
"Not all MIPS big endian fixup kinds added!");
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h b/llvm/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h
index bd4c5d35ddfbe..ef5a4b9a20d51 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h
@@ -26,120 +26,120 @@ namespace llvm {
/// instruction info tracks.
///
namespace MipsII {
- /// Target Operand Flag enum.
- enum TOF {
- //===------------------------------------------------------------------===//
- // Mips Specific MachineOperand flags.
-
- MO_NO_FLAG,
-
- /// MO_GOT - Represents the offset into the global offset table at which
- /// the address the relocation entry symbol resides during execution.
- MO_GOT,
-
- /// MO_GOT_CALL - Represents the offset into the global offset table at
- /// which the address of a call site relocation entry symbol resides
- /// during execution. This is
diff erent from the above since this flag
- /// can only be present in call instructions.
- MO_GOT_CALL,
-
- /// MO_GPREL - Represents the offset from the current gp value to be used
- /// for the relocatable object file being produced.
- MO_GPREL,
-
- /// MO_ABS_HI/LO - Represents the hi or low part of an absolute symbol
- /// address.
- MO_ABS_HI,
- MO_ABS_LO,
-
- /// MO_TLSGD - Represents the offset into the global offset table at which
- // the module ID and TSL block offset reside during execution (General
- // Dynamic TLS).
- MO_TLSGD,
-
- /// MO_TLSLDM - Represents the offset into the global offset table at which
- // the module ID and TSL block offset reside during execution (Local
- // Dynamic TLS).
- MO_TLSLDM,
- MO_DTPREL_HI,
- MO_DTPREL_LO,
-
- /// MO_GOTTPREL - Represents the offset from the thread pointer (Initial
- // Exec TLS).
- MO_GOTTPREL,
-
- /// MO_TPREL_HI/LO - Represents the hi and low part of the offset from
- // the thread pointer (Local Exec TLS).
- MO_TPREL_HI,
- MO_TPREL_LO,
-
- // N32/64 Flags.
- MO_GPOFF_HI,
- MO_GPOFF_LO,
- MO_GOT_DISP,
- MO_GOT_PAGE,
- MO_GOT_OFST,
-
- /// MO_HIGHER/HIGHEST - Represents the highest or higher half word of a
- /// 64-bit symbol address.
- MO_HIGHER,
- MO_HIGHEST,
-
- /// MO_GOT_HI16/LO16, MO_CALL_HI16/LO16 - Relocations used for large GOTs.
- MO_GOT_HI16,
- MO_GOT_LO16,
- MO_CALL_HI16,
- MO_CALL_LO16,
-
- /// Helper operand used to generate R_MIPS_JALR
- MO_JALR,
-
- /// MO_DLLIMPORT - On a symbol operand "FOO", this indicates that the
- /// reference is actually to the "__imp_FOO" symbol. This is used for
- /// dllimport linkage on windows.
- MO_DLLIMPORT = 0x20,
- };
-
- enum {
- //===------------------------------------------------------------------===//
- // Instruction encodings. These are the standard/most common forms for
- // Mips instructions.
- //
-
- // Pseudo - This represents an instruction that is a pseudo instruction
- // or one that has not been implemented yet. It is illegal to code generate
- // it, but tolerated for intermediate implementation stages.
- Pseudo = 0,
-
- /// FrmR - This form is for instructions of the format R.
- FrmR = 1,
- /// FrmI - This form is for instructions of the format I.
- FrmI = 2,
- /// FrmJ - This form is for instructions of the format J.
- FrmJ = 3,
- /// FrmFR - This form is for instructions of the format FR.
- FrmFR = 4,
- /// FrmFI - This form is for instructions of the format FI.
- FrmFI = 5,
- /// FrmOther - This form is for instructions that have no specific format.
- FrmOther = 6,
-
- FormMask = 15,
- /// IsCTI - Instruction is a Control Transfer Instruction.
- IsCTI = 1 << 4,
- /// HasForbiddenSlot - Instruction has a forbidden slot.
- HasForbiddenSlot = 1 << 5,
- /// HasFCCRegOperand - Instruction uses an $fcc<x> register.
- HasFCCRegOperand = 1 << 6
-
- };
-
- enum OperandType : unsigned {
- OPERAND_FIRST_MIPS_MEM_IMM = MCOI::OPERAND_FIRST_TARGET,
- OPERAND_MEM_SIMM9 = OPERAND_FIRST_MIPS_MEM_IMM,
- OPERAND_LAST_MIPS_MEM_IMM = OPERAND_MEM_SIMM9
- };
-}
+/// Target Operand Flag enum.
+enum TOF {
+ //===------------------------------------------------------------------===//
+ // Mips Specific MachineOperand flags.
+
+ MO_NO_FLAG,
+
+ // Represents the offset into the global offset table at which
+ // the address the relocation entry symbol resides during execution.
+ MO_GOT,
+
+ // Represents the offset into the global offset table at
+ // which the address of a call site relocation entry symbol resides
+ // during execution. This is
diff erent from the above since this flag
+ // can only be present in call instructions.
+ MO_GOT_CALL,
+
+ // Represents the offset from the current gp value to be used
+ // for the relocatable object file being produced.
+ MO_GPREL,
+
+ // Represents the hi or low part of an absolute symbol
+ // address.
+ MO_ABS_HI,
+ MO_ABS_LO,
+
+ // Represents the offset into the global offset table at which
+ // the module ID and TSL block offset reside during execution (General
+ // Dynamic TLS).
+ MO_TLSGD,
+
+ // Represents the offset into the global offset table at which
+ // the module ID and TSL block offset reside during execution (Local
+ // Dynamic TLS).
+ MO_TLSLDM,
+ MO_DTPREL_HI,
+ MO_DTPREL_LO,
+
+ // Represents the offset from the thread pointer (Initial
+ // Exec TLS).
+ MO_GOTTPREL,
+
+ // Represents the hi and low part of the offset from
+ // the thread pointer (Local Exec TLS).
+ MO_TPREL_HI,
+ MO_TPREL_LO,
+
+ // N32/64 Flags.
+ MO_GPOFF_HI,
+ MO_GPOFF_LO,
+ MO_GOT_DISP,
+ MO_GOT_PAGE,
+ MO_GOT_OFST,
+
+ // Represents the highest or higher half word of a
+ // 64-bit symbol address.
+ MO_HIGHER,
+ MO_HIGHEST,
+
+ // Relocations used for large GOTs.
+ MO_GOT_HI16,
+ MO_GOT_LO16,
+ MO_CALL_HI16,
+ MO_CALL_LO16,
+
+ // Helper operand used to generate R_MIPS_JALR
+ MO_JALR,
+
+ // On a symbol operand "FOO", this indicates that the
+ // reference is actually to the "__imp_FOO" symbol. This is used for
+ // dllimport linkage on windows.
+ MO_DLLIMPORT = 0x20,
+};
+
+enum {
+ //===------------------------------------------------------------------===//
+ // Instruction encodings. These are the standard/most common forms for
+ // Mips instructions.
+ //
+
+ // This represents an instruction that is a pseudo instruction
+ // or one that has not been implemented yet. It is illegal to code generate
+ // it, but tolerated for intermediate implementation stages.
+ Pseudo = 0,
+
+ // This form is for instructions of the format R.
+ FrmR = 1,
+ // This form is for instructions of the format I.
+ FrmI = 2,
+ // This form is for instructions of the format J.
+ FrmJ = 3,
+ // This form is for instructions of the format FR.
+ FrmFR = 4,
+ // This form is for instructions of the format FI.
+ FrmFI = 5,
+ // This form is for instructions that have no specific format.
+ FrmOther = 6,
+
+ FormMask = 15,
+ // Instruction is a Control Transfer Instruction.
+ IsCTI = 1 << 4,
+ // Instruction has a forbidden slot.
+ HasForbiddenSlot = 1 << 5,
+ // Instruction uses an $fcc<x> register.
+ HasFCCRegOperand = 1 << 6
+
+};
+
+enum OperandType : unsigned {
+ OPERAND_FIRST_MIPS_MEM_IMM = MCOI::OPERAND_FIRST_TARGET,
+ OPERAND_MEM_SIMM9 = OPERAND_FIRST_MIPS_MEM_IMM,
+ OPERAND_LAST_MIPS_MEM_IMM = OPERAND_MEM_SIMM9
+};
+} // namespace MipsII
inline static MCRegister getMSARegFromFReg(MCRegister Reg) {
if (Reg >= Mips::F0 && Reg <= Mips::F31)
@@ -149,6 +149,6 @@ inline static MCRegister getMSARegFromFReg(MCRegister Reg) {
else
return MCRegister();
}
-}
+} // namespace llvm
#endif
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h b/llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h
index b83d822bd8d03..02a993b464dba 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h
@@ -13,221 +13,220 @@
namespace llvm {
namespace Mips {
- // Although most of the current fixup types reflect a unique relocation
- // one can have multiple fixup types for a given relocation and thus need
- // to be uniquely named.
- //
- // This table *must* be in the same order of
- // MCFixupKindInfo Infos[Mips::NumTargetFixupKinds]
- // in MipsAsmBackend.cpp.
- //
- enum Fixups {
- // Branch fixups resulting in R_MIPS_16.
- fixup_Mips_16 = FirstTargetFixupKind,
+// Although most of the current fixup types reflect a unique relocation
+// one can have multiple fixup types for a given relocation and thus need
+// to be uniquely named.
+//
+// This table *must* be in the same order of
+// MCFixupKindInfo Infos[Mips::NumTargetFixupKinds]
+// in MipsAsmBackend.cpp.
+//
+enum Fixups {
+ // Branch fixups resulting in R_MIPS_16.
+ fixup_Mips_16 = FirstTargetFixupKind,
- // Pure 32 bit data fixup resulting in - R_MIPS_32.
- fixup_Mips_32,
+ // Pure 32 bit data fixup resulting in - R_MIPS_32.
+ fixup_Mips_32,
- // Full 32 bit data relative data fixup resulting in - R_MIPS_REL32.
- fixup_Mips_REL32,
+ // Full 32 bit data relative data fixup resulting in - R_MIPS_REL32.
+ fixup_Mips_REL32,
- // Jump 26 bit fixup resulting in - R_MIPS_26.
- fixup_Mips_26,
+ // Jump 26 bit fixup resulting in - R_MIPS_26.
+ fixup_Mips_26,
- // Pure upper 16 bit fixup resulting in - R_MIPS_HI16.
- fixup_Mips_HI16,
+ // Pure upper 16 bit fixup resulting in - R_MIPS_HI16.
+ fixup_Mips_HI16,
- // Pure lower 16 bit fixup resulting in - R_MIPS_LO16.
- fixup_Mips_LO16,
+ // Pure lower 16 bit fixup resulting in - R_MIPS_LO16.
+ fixup_Mips_LO16,
- // 16 bit fixup for GP offest resulting in - R_MIPS_GPREL16.
- fixup_Mips_GPREL16,
+ // 16 bit fixup for GP offest resulting in - R_MIPS_GPREL16.
+ fixup_Mips_GPREL16,
- // 16 bit literal fixup resulting in - R_MIPS_LITERAL.
- fixup_Mips_LITERAL,
+ // 16 bit literal fixup resulting in - R_MIPS_LITERAL.
+ fixup_Mips_LITERAL,
- // Symbol fixup resulting in - R_MIPS_GOT16.
- fixup_Mips_GOT,
+ // Symbol fixup resulting in - R_MIPS_GOT16.
+ fixup_Mips_GOT,
- // PC relative branch fixup resulting in - R_MIPS_PC16.
- fixup_Mips_PC16,
+ // PC relative branch fixup resulting in - R_MIPS_PC16.
+ fixup_Mips_PC16,
- // resulting in - R_MIPS_CALL16.
- fixup_Mips_CALL16,
+ // resulting in - R_MIPS_CALL16.
+ fixup_Mips_CALL16,
- // resulting in - R_MIPS_GPREL32.
- fixup_Mips_GPREL32,
+ // resulting in - R_MIPS_GPREL32.
+ fixup_Mips_GPREL32,
- // resulting in - R_MIPS_SHIFT5.
- fixup_Mips_SHIFT5,
+ // resulting in - R_MIPS_SHIFT5.
+ fixup_Mips_SHIFT5,
- // resulting in - R_MIPS_SHIFT6.
- fixup_Mips_SHIFT6,
+ // resulting in - R_MIPS_SHIFT6.
+ fixup_Mips_SHIFT6,
- // Pure 64 bit data fixup resulting in - R_MIPS_64.
- fixup_Mips_64,
+ // Pure 64 bit data fixup resulting in - R_MIPS_64.
+ fixup_Mips_64,
- // resulting in - R_MIPS_TLS_GD.
- fixup_Mips_TLSGD,
+ // resulting in - R_MIPS_TLS_GD.
+ fixup_Mips_TLSGD,
- // resulting in - R_MIPS_TLS_GOTTPREL.
- fixup_Mips_GOTTPREL,
+ // resulting in - R_MIPS_TLS_GOTTPREL.
+ fixup_Mips_GOTTPREL,
- // resulting in - R_MIPS_TLS_TPREL_HI16.
- fixup_Mips_TPREL_HI,
+ // resulting in - R_MIPS_TLS_TPREL_HI16.
+ fixup_Mips_TPREL_HI,
- // resulting in - R_MIPS_TLS_TPREL_LO16.
- fixup_Mips_TPREL_LO,
+ // resulting in - R_MIPS_TLS_TPREL_LO16.
+ fixup_Mips_TPREL_LO,
- // resulting in - R_MIPS_TLS_LDM.
- fixup_Mips_TLSLDM,
+ // resulting in - R_MIPS_TLS_LDM.
+ fixup_Mips_TLSLDM,
- // resulting in - R_MIPS_TLS_DTPREL_HI16.
- fixup_Mips_DTPREL_HI,
+ // resulting in - R_MIPS_TLS_DTPREL_HI16.
+ fixup_Mips_DTPREL_HI,
- // resulting in - R_MIPS_TLS_DTPREL_LO16.
- fixup_Mips_DTPREL_LO,
+ // resulting in - R_MIPS_TLS_DTPREL_LO16.
+ fixup_Mips_DTPREL_LO,
- // PC relative branch fixup resulting in - R_MIPS_PC16
- fixup_Mips_Branch_PCRel,
+ // PC relative branch fixup resulting in - R_MIPS_PC16
+ fixup_Mips_Branch_PCRel,
- // resulting in - R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_HI16
- // R_MICROMIPS_GPREL16/R_MICROMIPS_SUB/R_MICROMIPS_HI16
- fixup_Mips_GPOFF_HI,
- fixup_MICROMIPS_GPOFF_HI,
+ // resulting in - R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_HI16
+ // R_MICROMIPS_GPREL16/R_MICROMIPS_SUB/R_MICROMIPS_HI16
+ fixup_Mips_GPOFF_HI,
+ fixup_MICROMIPS_GPOFF_HI,
- // resulting in - R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_LO16
- // R_MICROMIPS_GPREL16/R_MICROMIPS_SUB/R_MICROMIPS_LO16
- fixup_Mips_GPOFF_LO,
- fixup_MICROMIPS_GPOFF_LO,
+ // resulting in - R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_LO16
+ // R_MICROMIPS_GPREL16/R_MICROMIPS_SUB/R_MICROMIPS_LO16
+ fixup_Mips_GPOFF_LO,
+ fixup_MICROMIPS_GPOFF_LO,
- // resulting in - R_MIPS_PAGE
- fixup_Mips_GOT_PAGE,
+ // resulting in - R_MIPS_PAGE
+ fixup_Mips_GOT_PAGE,
- // resulting in - R_MIPS_GOT_OFST
- fixup_Mips_GOT_OFST,
+ // resulting in - R_MIPS_GOT_OFST
+ fixup_Mips_GOT_OFST,
- // resulting in - R_MIPS_GOT_DISP
- fixup_Mips_GOT_DISP,
+ // resulting in - R_MIPS_GOT_DISP
+ fixup_Mips_GOT_DISP,
- // resulting in - R_MIPS_HIGHER/R_MICROMIPS_HIGHER
- fixup_Mips_HIGHER,
- fixup_MICROMIPS_HIGHER,
+ // resulting in - R_MIPS_HIGHER/R_MICROMIPS_HIGHER
+ fixup_Mips_HIGHER,
+ fixup_MICROMIPS_HIGHER,
- // resulting in - R_MIPS_HIGHEST/R_MICROMIPS_HIGHEST
- fixup_Mips_HIGHEST,
- fixup_MICROMIPS_HIGHEST,
+ // resulting in - R_MIPS_HIGHEST/R_MICROMIPS_HIGHEST
+ fixup_Mips_HIGHEST,
+ fixup_MICROMIPS_HIGHEST,
- // resulting in - R_MIPS_GOT_HI16
- fixup_Mips_GOT_HI16,
+ // resulting in - R_MIPS_GOT_HI16
+ fixup_Mips_GOT_HI16,
- // resulting in - R_MIPS_GOT_LO16
- fixup_Mips_GOT_LO16,
+ // resulting in - R_MIPS_GOT_LO16
+ fixup_Mips_GOT_LO16,
- // resulting in - R_MIPS_CALL_HI16
- fixup_Mips_CALL_HI16,
+ // resulting in - R_MIPS_CALL_HI16
+ fixup_Mips_CALL_HI16,
- // resulting in - R_MIPS_CALL_LO16
- fixup_Mips_CALL_LO16,
+ // resulting in - R_MIPS_CALL_LO16
+ fixup_Mips_CALL_LO16,
- // resulting in - R_MIPS_PC18_S3
- fixup_MIPS_PC18_S3,
+ // resulting in - R_MIPS_PC18_S3
+ fixup_MIPS_PC18_S3,
- // resulting in - R_MIPS_PC19_S2
- fixup_MIPS_PC19_S2,
+ // resulting in - R_MIPS_PC19_S2
+ fixup_MIPS_PC19_S2,
- // resulting in - R_MIPS_PC21_S2
- fixup_MIPS_PC21_S2,
+ // resulting in - R_MIPS_PC21_S2
+ fixup_MIPS_PC21_S2,
- // resulting in - R_MIPS_PC26_S2
- fixup_MIPS_PC26_S2,
+ // resulting in - R_MIPS_PC26_S2
+ fixup_MIPS_PC26_S2,
- // resulting in - R_MIPS_PCHI16
- fixup_MIPS_PCHI16,
+ // resulting in - R_MIPS_PCHI16
+ fixup_MIPS_PCHI16,
- // resulting in - R_MIPS_PCLO16
- fixup_MIPS_PCLO16,
+ // resulting in - R_MIPS_PCLO16
+ fixup_MIPS_PCLO16,
- // resulting in - R_MICROMIPS_26_S1
- fixup_MICROMIPS_26_S1,
+ // resulting in - R_MICROMIPS_26_S1
+ fixup_MICROMIPS_26_S1,
- // resulting in - R_MICROMIPS_HI16
- fixup_MICROMIPS_HI16,
+ // resulting in - R_MICROMIPS_HI16
+ fixup_MICROMIPS_HI16,
- // resulting in - R_MICROMIPS_LO16
- fixup_MICROMIPS_LO16,
+ // resulting in - R_MICROMIPS_LO16
+ fixup_MICROMIPS_LO16,
- // resulting in - R_MICROMIPS_GOT16
- fixup_MICROMIPS_GOT16,
+ // resulting in - R_MICROMIPS_GOT16
+ fixup_MICROMIPS_GOT16,
- // resulting in - R_MICROMIPS_PC7_S1
- fixup_MICROMIPS_PC7_S1,
+ // resulting in - R_MICROMIPS_PC7_S1
+ fixup_MICROMIPS_PC7_S1,
- // resulting in - R_MICROMIPS_PC10_S1
- fixup_MICROMIPS_PC10_S1,
+ // resulting in - R_MICROMIPS_PC10_S1
+ fixup_MICROMIPS_PC10_S1,
- // resulting in - R_MICROMIPS_PC16_S1
- fixup_MICROMIPS_PC16_S1,
+ // resulting in - R_MICROMIPS_PC16_S1
+ fixup_MICROMIPS_PC16_S1,
- // resulting in - R_MICROMIPS_PC26_S1
- fixup_MICROMIPS_PC26_S1,
+ // resulting in - R_MICROMIPS_PC26_S1
+ fixup_MICROMIPS_PC26_S1,
- // resulting in - R_MICROMIPS_PC19_S2
- fixup_MICROMIPS_PC19_S2,
+ // resulting in - R_MICROMIPS_PC19_S2
+ fixup_MICROMIPS_PC19_S2,
- // resulting in - R_MICROMIPS_PC18_S3
- fixup_MICROMIPS_PC18_S3,
+ // resulting in - R_MICROMIPS_PC18_S3
+ fixup_MICROMIPS_PC18_S3,
- // resulting in - R_MICROMIPS_PC21_S1
- fixup_MICROMIPS_PC21_S1,
+ // resulting in - R_MICROMIPS_PC21_S1
+ fixup_MICROMIPS_PC21_S1,
- // resulting in - R_MICROMIPS_CALL16
- fixup_MICROMIPS_CALL16,
+ // resulting in - R_MICROMIPS_CALL16
+ fixup_MICROMIPS_CALL16,
- // resulting in - R_MICROMIPS_GOT_DISP
- fixup_MICROMIPS_GOT_DISP,
+ // resulting in - R_MICROMIPS_GOT_DISP
+ fixup_MICROMIPS_GOT_DISP,
- // resulting in - R_MICROMIPS_GOT_PAGE
- fixup_MICROMIPS_GOT_PAGE,
+ // resulting in - R_MICROMIPS_GOT_PAGE
+ fixup_MICROMIPS_GOT_PAGE,
- // resulting in - R_MICROMIPS_GOT_OFST
- fixup_MICROMIPS_GOT_OFST,
+ // resulting in - R_MICROMIPS_GOT_OFST
+ fixup_MICROMIPS_GOT_OFST,
- // resulting in - R_MICROMIPS_TLS_GD
- fixup_MICROMIPS_TLS_GD,
+ // resulting in - R_MICROMIPS_TLS_GD
+ fixup_MICROMIPS_TLS_GD,
- // resulting in - R_MICROMIPS_TLS_LDM
- fixup_MICROMIPS_TLS_LDM,
+ // resulting in - R_MICROMIPS_TLS_LDM
+ fixup_MICROMIPS_TLS_LDM,
- // resulting in - R_MICROMIPS_TLS_DTPREL_HI16
- fixup_MICROMIPS_TLS_DTPREL_HI16,
+ // resulting in - R_MICROMIPS_TLS_DTPREL_HI16
+ fixup_MICROMIPS_TLS_DTPREL_HI16,
- // resulting in - R_MICROMIPS_TLS_DTPREL_LO16
- fixup_MICROMIPS_TLS_DTPREL_LO16,
+ // resulting in - R_MICROMIPS_TLS_DTPREL_LO16
+ fixup_MICROMIPS_TLS_DTPREL_LO16,
- // resulting in - R_MICROMIPS_TLS_GOTTPREL.
- fixup_MICROMIPS_GOTTPREL,
+ // resulting in - R_MICROMIPS_TLS_GOTTPREL.
+ fixup_MICROMIPS_GOTTPREL,
- // resulting in - R_MICROMIPS_TLS_TPREL_HI16
- fixup_MICROMIPS_TLS_TPREL_HI16,
+ // resulting in - R_MICROMIPS_TLS_TPREL_HI16
+ fixup_MICROMIPS_TLS_TPREL_HI16,
- // resulting in - R_MICROMIPS_TLS_TPREL_LO16
- fixup_MICROMIPS_TLS_TPREL_LO16,
+ // resulting in - R_MICROMIPS_TLS_TPREL_LO16
+ fixup_MICROMIPS_TLS_TPREL_LO16,
- // resulting in - R_MIPS_SUB/R_MICROMIPS_SUB
- fixup_Mips_SUB,
- fixup_MICROMIPS_SUB,
+ // resulting in - R_MIPS_SUB/R_MICROMIPS_SUB
+ fixup_Mips_SUB,
+ fixup_MICROMIPS_SUB,
- // resulting in - R_MIPS_JALR/R_MICROMIPS_JALR
- fixup_Mips_JALR,
- fixup_MICROMIPS_JALR,
+ // resulting in - R_MIPS_JALR/R_MICROMIPS_JALR
+ fixup_Mips_JALR,
+ fixup_MICROMIPS_JALR,
- // Marker
- LastTargetFixupKind,
- NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
- };
+ // Marker
+ LastTargetFixupKind,
+ NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
+};
} // namespace Mips
} // namespace llvm
-
#endif
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