[llvm] [NVPTX] Improve device function byval parameter lowering (PR #129188)

[LLVM Continuous Integration via llvm-commits]

llvm-ci wrote:

LLVM Buildbot has detected a new failure on builder `clang-ppc64le-linux-multistage` running on `ppc64le-clang-multistage-test` while building `llvm` at step 5 "ninja check 1".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/76/builds/7371

<details>
<summary>Here is the relevant piece of the build log for the reference</summary>

```
Step 5 (ninja check 1) failure: stage 1 checked (failure)
******************** TEST 'LLVM :: tools/llvm-exegesis/RISCV/rvv/reduction.test' FAILED ********************
Exit Code: 1

Command Output (stderr):
--
RUN: at line 1: /home/buildbots/llvm-external-buildbots/workers/ppc64le-clang-multistage-test/clang-ppc64le-multistage/stage1/bin/llvm-exegesis -mtriple=riscv64 -mcpu=sifive-p670 -benchmark-phase=assemble-measured-code --mode=latency --opcode-name=PseudoVWREDSUMU_VS_M8_E32 --min-instructions=100 |     /home/buildbots/llvm-external-buildbots/workers/ppc64le-clang-multistage-test/clang-ppc64le-multistage/stage1/bin/FileCheck /home/buildbots/llvm-external-buildbots/workers/ppc64le-clang-multistage-test/clang-ppc64le-multistage/llvm/llvm/test/tools/llvm-exegesis/RISCV/rvv/reduction.test
+ /home/buildbots/llvm-external-buildbots/workers/ppc64le-clang-multistage-test/clang-ppc64le-multistage/stage1/bin/llvm-exegesis -mtriple=riscv64 -mcpu=sifive-p670 -benchmark-phase=assemble-measured-code --mode=latency --opcode-name=PseudoVWREDSUMU_VS_M8_E32 --min-instructions=100
+ /home/buildbots/llvm-external-buildbots/workers/ppc64le-clang-multistage-test/clang-ppc64le-multistage/stage1/bin/FileCheck /home/buildbots/llvm-external-buildbots/workers/ppc64le-clang-multistage-test/clang-ppc64le-multistage/llvm/llvm/test/tools/llvm-exegesis/RISCV/rvv/reduction.test
/home/buildbots/llvm-external-buildbots/workers/ppc64le-clang-multistage-test/clang-ppc64le-multistage/llvm/llvm/test/tools/llvm-exegesis/RISCV/rvv/reduction.test:7:14: error: CHECK-NOT: excluded string found in input
# CHECK-NOT: V[[REG:[0-9]+]] V[[REG]] V{{[0-9]+}}M8 V[[REG]]
             ^
<stdin>:5:31: note: found here
 - 'PseudoVWREDSUMU_VS_M8_E32 V26 V26 V24M8 V26 i_0xffffffffffffffff i_0x5 i_0x0'
                              ^~~~~~~~~~~~~~~~~
<stdin>:5:32: note: captured var "REG"
 - 'PseudoVWREDSUMU_VS_M8_E32 V26 V26 V24M8 V26 i_0xffffffffffffffff i_0x5 i_0x0'
                               ^~

Input file: <stdin>
Check file: /home/buildbots/llvm-external-buildbots/workers/ppc64le-clang-multistage-test/clang-ppc64le-multistage/llvm/llvm/test/tools/llvm-exegesis/RISCV/rvv/reduction.test

-dump-input=help explains the following input dump.

Input was:
<<<<<<
         1: --- 
         2: mode: latency 
         3: key: 
         4:  instructions: 
         5:  - 'PseudoVWREDSUMU_VS_M8_E32 V26 V26 V24M8 V26 i_0xffffffffffffffff i_0x5 i_0x0' 
not:7'0                                   !~~~~~~~~~~~~~~~~                                    error: no match expected
not:7'1                                    !~                                                  captured var "REG"
         6:  config: 'vtype = {AVL: VLMAX, SEW: e32, Policy: tu/mu}' 
         7:  register_initial_values: 
         8:  - 'V26=0x0' 
         9:  - 'V24M8=0x0' 
        10: cpu_name: sifive-p670 
         .
         .
         .
>>>>>>

--

********************


```

</details>

https://github.com/llvm/llvm-project/pull/129188