[llvm] 23c41bf - [Exegesis][RISCV] Allow rvv/filter.test to retry
Min Hsu via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 28 16:16:52 PST 2025
Author: Min Hsu
Date: 2025-02-28T16:16:01-08:00
New Revision: 23c41bf1d599fddb4c5ee5eee7a30b5fdaa7f1be
URL: https://github.com/llvm/llvm-project/commit/23c41bf1d599fddb4c5ee5eee7a30b5fdaa7f1be
DIFF: https://github.com/llvm/llvm-project/commit/23c41bf1d599fddb4c5ee5eee7a30b5fdaa7f1be.diff
LOG: [Exegesis][RISCV] Allow rvv/filter.test to retry
Sometimes it'll fail to generate any snippet because it's unable to
assign unique def and use registers.
Mark this test as ALLOW_RETRIES. Also, lower the minimum number of
instructions per snippet in the hope to increase the chance of
assigning unique registers for every instructions.
Added:
Modified:
llvm/test/tools/llvm-exegesis/RISCV/rvv/filter.test
Removed:
################################################################################
diff --git a/llvm/test/tools/llvm-exegesis/RISCV/rvv/filter.test b/llvm/test/tools/llvm-exegesis/RISCV/rvv/filter.test
index e3a4336fdf670..858569e4b0ef5 100644
--- a/llvm/test/tools/llvm-exegesis/RISCV/rvv/filter.test
+++ b/llvm/test/tools/llvm-exegesis/RISCV/rvv/filter.test
@@ -1,5 +1,7 @@
# RUN: llvm-exegesis -mtriple=riscv64 -mcpu=sifive-x280 -benchmark-phase=assemble-measured-code --mode=inverse_throughput --opcode-name=PseudoVNCLIPU_WX_M1_MASK \
-# RUN: --riscv-filter-config='vtype = {VXRM: rod, AVL: VLMAX, SEW: e(8|16), Policy: ta/mu}' --max-configs-per-opcode=1000 --min-instructions=100 | FileCheck %s
+# RUN: --riscv-filter-config='vtype = {VXRM: rod, AVL: VLMAX, SEW: e(8|16), Policy: ta/mu}' --max-configs-per-opcode=1000 --min-instructions=10 | FileCheck %s
+# Sometimes it'll fail to generate any snippet because it's unable to assign unique def and use registers.
+# ALLOW_RETRIES: 2
# CHECK: config: 'vtype = {VXRM: rod, AVL: VLMAX, SEW: e8, Policy: ta/mu}'
# CHECK: config: 'vtype = {VXRM: rod, AVL: VLMAX, SEW: e16, Policy: ta/mu}'
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