[llvm] [NVPTX][NVPTXLowerArgs] Add NewPM interface for NVPTXLowerArgs (PR #128960)
Akshay Deodhar via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 28 15:15:13 PST 2025
https://github.com/akshayrdeodhar updated https://github.com/llvm/llvm-project/pull/128960
>From 5aac60e457bdab2de4a30bef273d9f0f41cbdeba Mon Sep 17 00:00:00 2001
From: Akshay Deodhar <adeodhar at nvidia.com>
Date: Wed, 26 Feb 2025 22:46:24 +0000
Subject: [PATCH] [NVPTX][NVPTXLowerArgs] Add NewPM interface for
NVPTXLowerArgs
---
llvm/lib/Target/NVPTX/NVPTX.h | 10 ++++
llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp | 58 ++++++++++----------
llvm/lib/Target/NVPTX/NVPTXPassRegistry.def | 1 +
llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp | 4 +-
llvm/test/CodeGen/NVPTX/lower-byval-args.ll | 2 +
5 files changed, 44 insertions(+), 31 deletions(-)
diff --git a/llvm/lib/Target/NVPTX/NVPTX.h b/llvm/lib/Target/NVPTX/NVPTX.h
index ca915cd3f3732..92d3effb45cda 100644
--- a/llvm/lib/Target/NVPTX/NVPTX.h
+++ b/llvm/lib/Target/NVPTX/NVPTX.h
@@ -18,6 +18,7 @@
#include "llvm/Pass.h"
#include "llvm/Support/AtomicOrdering.h"
#include "llvm/Support/CodeGen.h"
+#include "llvm/Target/TargetMachine.h"
namespace llvm {
class FunctionPass;
@@ -74,6 +75,15 @@ struct NVPTXCopyByValArgsPass : PassInfoMixin<NVPTXCopyByValArgsPass> {
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
+struct NVPTXLowerArgsPass : PassInfoMixin<NVPTXLowerArgsPass> {
+private:
+ TargetMachine &TM;
+
+public:
+ NVPTXLowerArgsPass(TargetMachine &TM) : TM(TM) {};
+ PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
+};
+
namespace NVPTX {
enum DrvInterface {
NVCL,
diff --git a/llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp b/llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
index c763b54c8dbfe..1a7216e0488d8 100644
--- a/llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
@@ -161,27 +161,16 @@
using namespace llvm;
namespace llvm {
-void initializeNVPTXLowerArgsPass(PassRegistry &);
+void initializeNVPTXLowerArgsLegacyPassPass(PassRegistry &);
}
namespace {
-class NVPTXLowerArgs : public FunctionPass {
+class NVPTXLowerArgsLegacyPass : public FunctionPass {
bool runOnFunction(Function &F) override;
- bool runOnKernelFunction(const NVPTXTargetMachine &TM, Function &F);
- bool runOnDeviceFunction(const NVPTXTargetMachine &TM, Function &F);
-
- // handle byval parameters
- void handleByValParam(const NVPTXTargetMachine &TM, Argument *Arg);
- // Knowing Ptr must point to the global address space, this function
- // addrspacecasts Ptr to global and then back to generic. This allows
- // NVPTXInferAddressSpaces to fold the global-to-generic cast into
- // loads/stores that appear later.
- void markPointerAsGlobal(Value *Ptr);
-
public:
static char ID; // Pass identification, replacement for typeid
- NVPTXLowerArgs() : FunctionPass(ID) {}
+ NVPTXLowerArgsLegacyPass() : FunctionPass(ID) {}
StringRef getPassName() const override {
return "Lower pointer arguments of CUDA kernels";
}
@@ -191,12 +180,12 @@ class NVPTXLowerArgs : public FunctionPass {
};
} // namespace
-char NVPTXLowerArgs::ID = 1;
+char NVPTXLowerArgsLegacyPass::ID = 1;
-INITIALIZE_PASS_BEGIN(NVPTXLowerArgs, "nvptx-lower-args",
+INITIALIZE_PASS_BEGIN(NVPTXLowerArgsLegacyPass, "nvptx-lower-args",
"Lower arguments (NVPTX)", false, false)
INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
-INITIALIZE_PASS_END(NVPTXLowerArgs, "nvptx-lower-args",
+INITIALIZE_PASS_END(NVPTXLowerArgsLegacyPass, "nvptx-lower-args",
"Lower arguments (NVPTX)", false, false)
// =============================================================================
@@ -571,8 +560,7 @@ void copyByValParam(Function &F, Argument &Arg) {
}
} // namespace
-void NVPTXLowerArgs::handleByValParam(const NVPTXTargetMachine &TM,
- Argument *Arg) {
+static void handleByValParam(const NVPTXTargetMachine &TM, Argument *Arg) {
Function *Func = Arg->getParent();
bool HasCvtaParam =
TM.getSubtargetImpl(*Func)->hasCvtaParam() && isKernelFunction(*Func);
@@ -641,7 +629,10 @@ void NVPTXLowerArgs::handleByValParam(const NVPTXTargetMachine &TM,
copyByValParam(*Func, *Arg);
}
-void NVPTXLowerArgs::markPointerAsGlobal(Value *Ptr) {
+// If `Ptr` is known to point to global memory, add addrspacecast to global
+// and back to generic. This will ensure that load/store operations on `Ptr`
+// are lowered to `{ld,st}.global`
+static void markPointerAsGlobal(Value *Ptr) {
if (Ptr->getType()->getPointerAddressSpace() != ADDRESS_SPACE_GENERIC)
return;
@@ -670,13 +661,12 @@ void NVPTXLowerArgs::markPointerAsGlobal(Value *Ptr) {
// =============================================================================
// Main function for this pass.
// =============================================================================
-bool NVPTXLowerArgs::runOnKernelFunction(const NVPTXTargetMachine &TM,
- Function &F) {
+static bool runOnKernelFunction(const NVPTXTargetMachine &TM, Function &F) {
// Copying of byval aggregates + SROA may result in pointers being loaded as
// integers, followed by intotoptr. We may want to mark those as global, too,
// but only if the loaded integer is used exclusively for conversion to a
// pointer with inttoptr.
- auto HandleIntToPtr = [this](Value &V) {
+ auto HandleIntToPtr = [](Value &V) {
if (llvm::all_of(V.users(), [](User *U) { return isa<IntToPtrInst>(U); })) {
SmallVector<User *, 16> UsersToUpdate(V.users());
for (User *U : UsersToUpdate)
@@ -721,8 +711,7 @@ bool NVPTXLowerArgs::runOnKernelFunction(const NVPTXTargetMachine &TM,
}
// Device functions only need to copy byval args into local memory.
-bool NVPTXLowerArgs::runOnDeviceFunction(const NVPTXTargetMachine &TM,
- Function &F) {
+static bool runOnDeviceFunction(const NVPTXTargetMachine &TM, Function &F) {
LLVM_DEBUG(dbgs() << "Lowering function args of " << F.getName() << "\n");
for (Argument &Arg : F.args())
if (Arg.getType()->isPointerTy() && Arg.hasByValAttr())
@@ -730,14 +719,18 @@ bool NVPTXLowerArgs::runOnDeviceFunction(const NVPTXTargetMachine &TM,
return true;
}
-bool NVPTXLowerArgs::runOnFunction(Function &F) {
- auto &TM = getAnalysis<TargetPassConfig>().getTM<NVPTXTargetMachine>();
-
+static bool processFunction(Function &F, NVPTXTargetMachine &TM) {
return isKernelFunction(F) ? runOnKernelFunction(TM, F)
: runOnDeviceFunction(TM, F);
}
-FunctionPass *llvm::createNVPTXLowerArgsPass() { return new NVPTXLowerArgs(); }
+bool NVPTXLowerArgsLegacyPass::runOnFunction(Function &F) {
+ auto &TM = getAnalysis<TargetPassConfig>().getTM<NVPTXTargetMachine>();
+ return processFunction(F, TM);
+}
+FunctionPass *llvm::createNVPTXLowerArgsPass() {
+ return new NVPTXLowerArgsLegacyPass();
+}
static bool copyFunctionByValArgs(Function &F) {
LLVM_DEBUG(dbgs() << "Creating a copy of byval args of " << F.getName()
@@ -757,3 +750,10 @@ PreservedAnalyses NVPTXCopyByValArgsPass::run(Function &F,
return copyFunctionByValArgs(F) ? PreservedAnalyses::none()
: PreservedAnalyses::all();
}
+
+PreservedAnalyses NVPTXLowerArgsPass::run(Function &F,
+ FunctionAnalysisManager &AM) {
+ auto &NTM = static_cast<NVPTXTargetMachine &>(TM);
+ bool Changed = processFunction(F, NTM);
+ return Changed ? PreservedAnalyses::none() : PreservedAnalyses::all();
+}
diff --git a/llvm/lib/Target/NVPTX/NVPTXPassRegistry.def b/llvm/lib/Target/NVPTX/NVPTXPassRegistry.def
index 28ea9dd9c0227..34c79b8f77bae 100644
--- a/llvm/lib/Target/NVPTX/NVPTXPassRegistry.def
+++ b/llvm/lib/Target/NVPTX/NVPTXPassRegistry.def
@@ -38,4 +38,5 @@ FUNCTION_ALIAS_ANALYSIS("nvptx-aa", NVPTXAA())
FUNCTION_PASS("nvvm-intr-range", NVVMIntrRangePass())
FUNCTION_PASS("nvvm-reflect", NVVMReflectPass())
FUNCTION_PASS("nvptx-copy-byval-args", NVPTXCopyByValArgsPass())
+FUNCTION_PASS("nvptx-lower-args", NVPTXLowerArgsPass(*this));
#undef FUNCTION_PASS
diff --git a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
index f2afa6fc20bfa..ae93e4f326914 100644
--- a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
@@ -98,7 +98,7 @@ void initializeNVPTXLowerAggrCopiesPass(PassRegistry &);
void initializeNVPTXLowerAllocaPass(PassRegistry &);
void initializeNVPTXLowerUnreachablePass(PassRegistry &);
void initializeNVPTXCtorDtorLoweringLegacyPass(PassRegistry &);
-void initializeNVPTXLowerArgsPass(PassRegistry &);
+void initializeNVPTXLowerArgsLegacyPassPass(PassRegistry &);
void initializeNVPTXProxyRegErasurePass(PassRegistry &);
void initializeNVVMIntrRangePass(PassRegistry &);
void initializeNVVMReflectPass(PassRegistry &);
@@ -121,7 +121,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeNVPTXTarget() {
initializeNVPTXAllocaHoistingPass(PR);
initializeNVPTXAssignValidGlobalNamesPass(PR);
initializeNVPTXAtomicLowerPass(PR);
- initializeNVPTXLowerArgsPass(PR);
+ initializeNVPTXLowerArgsLegacyPassPass(PR);
initializeNVPTXLowerAllocaPass(PR);
initializeNVPTXLowerUnreachablePass(PR);
initializeNVPTXCtorDtorLoweringLegacyPass(PR);
diff --git a/llvm/test/CodeGen/NVPTX/lower-byval-args.ll b/llvm/test/CodeGen/NVPTX/lower-byval-args.ll
index a09fb35d2d546..cfe934544eb3a 100644
--- a/llvm/test/CodeGen/NVPTX/lower-byval-args.ll
+++ b/llvm/test/CodeGen/NVPTX/lower-byval-args.ll
@@ -1,6 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --scrub-attributes --version 5
; RUN: opt < %s -mtriple nvptx64 -mcpu=sm_60 -mattr=ptx77 -nvptx-lower-args -S | FileCheck %s --check-prefixes=COMMON,SM_60
; RUN: opt < %s -mtriple nvptx64 -mcpu=sm_70 -mattr=ptx77 -nvptx-lower-args -S | FileCheck %s --check-prefixes=COMMON,SM_70
+; RUN: opt < %s -mtriple nvptx64 -mcpu=sm_60 -mattr=ptx77 -passes=nvptx-lower-args -S | FileCheck %s --check-prefixes=COMMON,SM_60
+; RUN: opt < %s -mtriple nvptx64 -mcpu=sm_70 -mattr=ptx77 -passes=nvptx-lower-args -S | FileCheck %s --check-prefixes=COMMON,SM_70
; RUN: opt < %s -mtriple nvptx64 -mcpu=sm_70 -mattr=ptx77 -passes=nvptx-copy-byval-args -S | FileCheck %s --check-prefixes=COMMON,COPY
source_filename = "<stdin>"
target datalayout = "e-i64:64-i128:128-v16:16-v32:32-n16:32:64"
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