[llvm] b2cc28c - [Exegesis][RISCV] Only check if vd and vs2 are alias in rvv/reduction.test

[Min Hsu via llvm-commits]

Author: Min Hsu
Date: 2025-02-28T14:56:04-08:00
New Revision: b2cc28cab113554aa63b9097f23796d59175d28f

URL: https://github.com/llvm/llvm-project/commit/b2cc28cab113554aa63b9097f23796d59175d28f
DIFF: https://github.com/llvm/llvm-project/commit/b2cc28cab113554aa63b9097f23796d59175d28f.diff

LOG: [Exegesis][RISCV] Only check if vd and vs2 are alias in rvv/reduction.test

This test was designed to check if we alias between vd and vs2. While we
make sure there is no alias relationship between vd and vs1 in the
snippet generator, there is nothing preventing the randomizer to assign
the same register between vs1 and vs2. Which makes this test pretty
unstable.
However, we really only care if vd and vs2 are alias, so instead of
going an extra mile to check whether vd and vs1 are NOT alias, which is
actually irrelevant, we should just focusing on checking if vd and vs2
are alias.

Added: 
    

Modified: 
    llvm/test/tools/llvm-exegesis/RISCV/rvv/reduction.test

Removed: 
    


################################################################################
diff  --git a/llvm/test/tools/llvm-exegesis/RISCV/rvv/reduction.test b/llvm/test/tools/llvm-exegesis/RISCV/rvv/reduction.test
index a637fa24af16b..600f29b745d0b 100644
--- a/llvm/test/tools/llvm-exegesis/RISCV/rvv/reduction.test
+++ b/llvm/test/tools/llvm-exegesis/RISCV/rvv/reduction.test
@@ -1,7 +1,7 @@
 # RUN: llvm-exegesis -mtriple=riscv64 -mcpu=sifive-p670 -benchmark-phase=assemble-measured-code --mode=latency --opcode-name=PseudoVWREDSUMU_VS_M8_E32 --min-instructions=100 | \
 # RUN:    FileCheck %s
 
-# Make sure reduction ops don't have alias between vd and vs1
+# Make sure reduction ops alias between vd and vs2
 # CHECK:      instructions:
 # CHECK-NEXT: PseudoVWREDSUMU_VS_M8_E32
-# CHECK-NOT:  V[[REG:[0-9]+]] V[[REG]] V{{[0-9]+}}M8 V[[REG]]
+# CHECK-SAME:  V[[REG:[0-9]+]] V[[REG]] V{{[0-9]+}}M8