[llvm] [SandboxVec][BottomUpVec] Fix vectorization of vector constants (PR #129290)

[LLVM Continuous Integration via llvm-commits]

llvm-ci wrote:

LLVM Buildbot has detected a new failure on builder `llvm-clang-x86_64-gcc-ubuntu` running on `sie-linux-worker3` while building `llvm` at step 6 "test-build-unified-tree-check-all".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/174/builds/13769

<details>
<summary>Here is the relevant piece of the build log for the reference</summary>

```
Step 6 (test-build-unified-tree-check-all) failure: test (failure)
******************** TEST 'LLVM :: tools/llvm-exegesis/RISCV/rvv/reduction.test' FAILED ********************
Exit Code: 1

Command Output (stderr):
--
RUN: at line 1: /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/build/bin/llvm-exegesis -mtriple=riscv64 -mcpu=sifive-p670 -benchmark-phase=assemble-measured-code --mode=latency --opcode-name=PseudoVWREDSUMU_VS_M8_E32 --min-instructions=100 |     /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/build/bin/FileCheck /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/llvm-project/llvm/test/tools/llvm-exegesis/RISCV/rvv/reduction.test
+ /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/build/bin/llvm-exegesis -mtriple=riscv64 -mcpu=sifive-p670 -benchmark-phase=assemble-measured-code --mode=latency --opcode-name=PseudoVWREDSUMU_VS_M8_E32 --min-instructions=100
+ /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/build/bin/FileCheck /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/llvm-project/llvm/test/tools/llvm-exegesis/RISCV/rvv/reduction.test
/home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/llvm-project/llvm/test/tools/llvm-exegesis/RISCV/rvv/reduction.test:7:14: error: CHECK-NOT: excluded string found in input
# CHECK-NOT: V[[REG:[0-9]+]] V[[REG]] V{{[0-9]+}}M8 V[[REG]]
             ^
<stdin>:5:31: note: found here
 - 'PseudoVWREDSUMU_VS_M8_E32 V1 V1 V0M8 V16 i_0xffffffffffffffff i_0x5 i_0x0'
                              ^~~~~~~~~~~~~
<stdin>:5:32: note: captured var "REG"
 - 'PseudoVWREDSUMU_VS_M8_E32 V1 V1 V0M8 V16 i_0xffffffffffffffff i_0x5 i_0x0'
                               ^

Input file: <stdin>
Check file: /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/llvm-project/llvm/test/tools/llvm-exegesis/RISCV/rvv/reduction.test

-dump-input=help explains the following input dump.

Input was:
<<<<<<
         1: --- 
         2: mode: latency 
         3: key: 
         4:  instructions: 
check:5      ^~~~~~~~~~~~~
         5:  - 'PseudoVWREDSUMU_VS_M8_E32 V1 V1 V0M8 V16 i_0xffffffffffffffff i_0x5 i_0x0' 
next:6          ^~~~~~~~~~~~~~~~~~~~~~~~~
not:7'0                                   !~~~~~~~~~~~~                                     error: no match expected
not:7'1                                    !                                                captured var "REG"
         6:  config: 'vtype = {AVL: VLMAX, SEW: e32, Policy: tu/mu}' 
         7:  register_initial_values: 
         8:  - 'V1=0x0' 
         9:  - 'V0M8=0x0' 
        10:  - 'V16=0x0' 
        11: cpu_name: sifive-p670 
        12: llvm_triple: riscv64 
        13: min_instructions: 100 
        14: measurements: [] 
        15: error: actual measurements skipped. 
        16: info: Repeating a single implicitly serial instruction 
        17: assembled_snippet: 57733009D70008C2D70008C2D70008C2D70008C28280 
        18: ... 
        19: 
eof:7       ^
>>>>>>
...

```

</details>

https://github.com/llvm/llvm-project/pull/129290