[llvm] [AMDGPU] Ensure divergence for v_alignbit (PR #129159)

[Matt Arsenault via llvm-commits]

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@@ -2500,11 +2500,11 @@ def : AMDGPUPat <
 
 def : ROTRPattern <V_ALIGNBIT_B32_e64>;
 
-def : GCNPat<(i32 (trunc (srl i64:$src0, (and i32:$src1, (i32 31))))),
+def : GCNPat<(i32 (DivergentUnaryFrag<trunc> (srl i64:$src0, (and i32:$src1, (i32 31))))),
           (V_ALIGNBIT_B32_e64 (i32 (EXTRACT_SUBREG (i64 $src0), sub1)),
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arsenm wrote:

Why do we handle these as patterns? Can we do this as a combine to produce fshr? 

https://github.com/llvm/llvm-project/pull/129159