[llvm] [AMDGPU] Skip handling of non-byte types in promote alloca. (PR #128769)

[Sumanth Gundapaneni via llvm-commits]

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@@ -0,0 +1,21 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -passes=amdgpu-promote-alloca < %s | FileCheck %s
+
+; Verify that we do not crash and not promote non-byte alloca types.
+define <8 x i1> @non_byte_alloca_type() {
+; CHECK-LABEL: define <8 x i1> @non_byte_alloca_type() {
+; CHECK-NEXT:  [[ENTRY:.*:]]
+; CHECK-NEXT:    [[C:%.*]] = icmp ugt <16 x i1> zeroinitializer, zeroinitializer
+; CHECK-NEXT:    [[RP:%.*]] = alloca <8 x i1>, align 1
+; CHECK-NEXT:    [[TMP0:%.*]] = load <8 x i1>, ptr [[RP]], align 1
+; CHECK-NEXT:    store <16 x i1> [[C]], ptr [[RP]], align 2
+; CHECK-NEXT:    ret <8 x i1> [[TMP0]]
+;
+entry:
+  %C = icmp ugt <16 x i1> zeroinitializer, zeroinitializer
+  %RP = alloca <8 x i1>, align 1
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sgundapa wrote:

Thats correct. Here is an example that might trigger an UB

@G = global <8 x float> <float 4.200000e+01, float 4.200000e+01, float 4.200000e+01, float 4.200000e+01, float 4.200000e+01, float 4.200000e+01, float 4.200000e+01, float 4.200000e+01>

define <8 x i1> @f(float %0, i32 %1, i16 %2) {
BB:
  %LGV = load <8 x float>, ptr @G, align 32
  %RP = alloca <8 x i1>, align 1
  %L = load <8 x float>, ptr %RP, align 32
  %C = fcmp olt <8 x float> %L, %LGV
  ret <8 x i1> %C
}


https://github.com/llvm/llvm-project/pull/128769