[llvm] [X86] Extend `combinei64TruncSrlAdd` to handle patterns with `or` and `xor` (PR #128435)
João Gouveia via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 27 02:24:37 PST 2025
================
@@ -53810,11 +53827,15 @@ static SDValue combineTruncatedArithmetic(SDNode *N, SelectionDAG &DAG,
if (!Src.hasOneUse())
return SDValue();
- if (SDValue R = combinei64TruncSrlAdd(Src, VT, DAG, DL))
- return R;
+ if (VT == MVT::i32 && SrcVT == MVT::i64 && SrcOpcode == ISD::SRL &&
+ Src.getOperand(0).getNumOperands() == 2 &&
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joaotgouveia wrote:
Removing that check causes LLVM to crash on a few regression tests (`CodeGen/X86/arg-cast.ll`, `CodeGen/X86/pr49162.ll`, `CodeGen/X86/vector-reduce-xor-bool.ll`, and `ExecutionEngine/MCJIT/non-extern-addend.ll`). I might be mistaken, but at the time `combineTruncatedArithmetic` is called, we have no information about whether the first operand of `Src` is actually a binary operation. Calling `Src.getOperand(0).getOperand(1)` might cause us to attempt to access an invalid operand.
https://github.com/llvm/llvm-project/pull/128435
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