[llvm] c11e3da - [RISCV] Correct RISCVTTIImpl::getIntImmCostInst for Zba (#128174)

[via llvm-commits]

Author: Gergely Futo
Date: 2025-02-27T08:48:55+01:00
New Revision: c11e3dafcf32b9b5af8ac005af6ca8bc07934a65

URL: https://github.com/llvm/llvm-project/commit/c11e3dafcf32b9b5af8ac005af6ca8bc07934a65
DIFF: https://github.com/llvm/llvm-project/commit/c11e3dafcf32b9b5af8ac005af6ca8bc07934a65.diff

LOG: [RISCV] Correct RISCVTTIImpl::getIntImmCostInst for Zba (#128174)

zext.w is only available on RV64.

We also never hoist UINT64_C(0xffffffff) on RV32, since the AND is
deleted by SelectionDAG after type legalization splits it.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
    llvm/test/Transforms/ConstantHoisting/RISCV/immediates.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index dfea25e11c0b6..d19023b19ccdd 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -207,7 +207,8 @@ InstructionCost RISCVTTIImpl::getIntImmCostInst(unsigned Opcode, unsigned Idx,
     if (Imm == UINT64_C(0xffff) && ST->hasStdExtZbb())
       return TTI::TCC_Free;
     // zext.w
-    if (Imm == UINT64_C(0xffffffff) && ST->hasStdExtZba())
+    if (Imm == UINT64_C(0xffffffff) &&
+        ((ST->hasStdExtZba() && ST->isRV64()) || ST->isRV32()))
       return TTI::TCC_Free;
     // bclri
     if (ST->hasStdExtZbs() && (~Imm).isPowerOf2())

diff  --git a/llvm/test/Transforms/ConstantHoisting/RISCV/immediates.ll b/llvm/test/Transforms/ConstantHoisting/RISCV/immediates.ll
index 329281e7dc301..2d88e78285da2 100644
--- a/llvm/test/Transforms/ConstantHoisting/RISCV/immediates.ll
+++ b/llvm/test/Transforms/ConstantHoisting/RISCV/immediates.ll
@@ -1,5 +1,5 @@
-; RUN: opt -mtriple=riscv32-unknown-elf -S -passes=consthoist < %s | FileCheck %s
-; RUN: opt -mtriple=riscv64-unknown-elf -S -passes=consthoist < %s | FileCheck %s
+; RUN: opt -mtriple=riscv32-unknown-elf -S -passes=consthoist < %s | FileCheck %s -check-prefixes=CHECK,RV32I
+; RUN: opt -mtriple=riscv64-unknown-elf -S -passes=consthoist < %s | FileCheck %s -check-prefixes=CHECK,RV64I
 
 ; Check that we don't hoist immediates with small values.
 define i64 @test1(i64 %a) nounwind {
@@ -55,16 +55,21 @@ define i32 @test6(i32 %a) nounwind "target-features"="+zbb" {
   ret i32 %2
 }
 
-; Check that we hoist zext.w without Zba.
+; Check that we hoist zext.w without Zba on RV64.
+; Check that we don't hoist on RV32.
 define i64 @test7(i64 %a) nounwind {
-; CHECK-LABEL: test7
-; CHECK: %const = bitcast i64 4294967295 to i64
+; RV32I-LABEL: test7
+; RV32I: and i64 %a, 4294967295
+
+; RV64I-LABEL: test7
+; RV64I: %const = bitcast i64 4294967295 to i64
   %1 = and i64 %a, 4294967295
   %2 = and i64 %1, 4294967295
   ret i64 %2
 }
 
-; Check that we don't hoist zext.w with Zba.
+; Check that we don't hoist zext.w with Zba on RV64.
+; Check that we don't hoist on RV32.
 define i64 @test8(i64 %a) nounwind "target-features"="+zba" {
 ; CHECK-LABEL: test8
 ; CHECK: and i64 %a, 4294967295