[llvm] [AMDGPU] Merge consecutive wait_alu instruction (PR #128916)

[Shilei Tian via llvm-commits]

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@@ -362,6 +377,13 @@ class AMDGPUWaitSGPRHazards {
           Mask = AMDGPU::DepCtr::encodeFieldVaSdst(Mask, 0);
         }
         if (Emit) {
+          if (MI != MI->getParent()->begin()) {
+            MachineInstr &PrevMI = *std::prev(MI);
+            if (PrevMI.getOpcode() == AMDGPU::S_WAITCNT_DEPCTR) {
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shiltian wrote:

do we also want to check s_wait_alu here? They are aliases.

https://github.com/llvm/llvm-project/pull/128916