[llvm] add v_cndmask_t16 to hazardmask (PR #128912)
Brox Chen via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 26 09:01:32 PST 2025
https://github.com/broxigarchen created https://github.com/llvm/llvm-project/pull/128912
None
>From 04bafa150570e985c538685062d5e4d328d4648f Mon Sep 17 00:00:00 2001
From: guochen2 <guochen2 at amd.com>
Date: Wed, 26 Feb 2025 11:55:01 -0500
Subject: [PATCH] add v_cndmask_t16 to hazardmask
---
llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
index 1ff75095b220a..ecdd17e0e20ce 100644
--- a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
@@ -3011,7 +3011,9 @@ bool GCNHazardRecognizer::fixVALUMaskWriteHazard(MachineInstr *MI) {
switch (I.getOpcode()) {
case AMDGPU::V_ADDC_U32_e32:
case AMDGPU::V_ADDC_U32_dpp:
+ case AMDGPU::V_CNDMASK_B16_t16_e32:
case AMDGPU::V_CNDMASK_B16_fake16_e32:
+ case AMDGPU::V_CNDMASK_B16_t16_dpp:
case AMDGPU::V_CNDMASK_B16_fake16_dpp:
case AMDGPU::V_CNDMASK_B32_e32:
case AMDGPU::V_CNDMASK_B32_dpp:
@@ -3027,7 +3029,9 @@ bool GCNHazardRecognizer::fixVALUMaskWriteHazard(MachineInstr *MI) {
HazardReg == AMDGPU::VCC_HI;
case AMDGPU::V_ADDC_U32_e64:
case AMDGPU::V_ADDC_U32_e64_dpp:
+ case AMDGPU::V_CNDMASK_B16_t16_e64:
case AMDGPU::V_CNDMASK_B16_fake16_e64:
+ case AMDGPU::V_CNDMASK_B16_t16_e64_dpp:
case AMDGPU::V_CNDMASK_B16_fake16_e64_dpp:
case AMDGPU::V_CNDMASK_B32_e64:
case AMDGPU::V_CNDMASK_B32_e64_dpp:
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