[llvm] [RISCV] Move VMV0 elimination past machine SSA opts (PR #126850)

[via llvm-commits]

newgre wrote:

This change seems to cause an ICE when compiling the following code:

```C
char d[];
int f;
void sigsetjmp();
#define a(b, c) sigsetjmp()
void e() {
  a(, );
  f = 0;
  for (; f < 7; f++) d[f] = f;
}
```

using this compile script:
```sh
#!/bin/bash

clang \
'-mtune=sifive-x280' \
-target \
riscv64-unknown-linux-musl \
'-march=rv64gcv1p0_zfh_zvfh_xsfvcp' \
-w \
-Os \
-c \
reduce_me.c \
-o \
/tmp/reduce_me.o
```

Could we roll back this change until this is fixed? Please do let me know if you need more info, or having trouble to reproduce.

https://github.com/llvm/llvm-project/pull/126850