[llvm] [RISCV] Merge a some of the Sifive decoder tables. (PR #128794)
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Tue Feb 25 16:48:20 PST 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-risc-v
Author: Craig Topper (topperc)
<details>
<summary>Changes</summary>
This makes a single table for vector and another table for system. I left sf.cease out of system because its not in custom encoding space. The other system instructions are in the custom part of OPC_SYSTEM.
---
Full diff: https://github.com/llvm/llvm-project/pull/128794.diff
2 Files Affected:
- (modified) llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp (+13-20)
- (modified) llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td (+7-7)
``````````diff
diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
index 1025b57369f4a..9b3104e86a8da 100644
--- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
@@ -631,6 +631,15 @@ static constexpr FeatureBitset XqciFeatureGroup = {
RISCV::FeatureVendorXqcisls,
};
+static constexpr FeatureBitset XSfVectorGroup = {
+ RISCV::FeatureVendorXSfvcp, RISCV::FeatureVendorXSfvqmaccdod,
+ RISCV::FeatureVendorXSfvqmaccqoq, RISCV::FeatureVendorXSfvfwmaccqqq,
+ RISCV::FeatureVendorXSfvfnrclipxfqf};
+static constexpr FeatureBitset XSfSystemGroup = {
+ RISCV::FeatureVendorXSiFivecdiscarddlone,
+ RISCV::FeatureVendorXSiFivecflushdlone,
+};
+
DecodeStatus RISCVDisassembler::getInstruction32(MCInst &MI, uint64_t &Size,
ArrayRef<uint8_t> Bytes,
uint64_t Address,
@@ -677,26 +686,10 @@ DecodeStatus RISCVDisassembler::getInstruction32(MCInst &MI, uint64_t &Size,
DecoderTableXTHeadSync32, "XTHeadSync");
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXTHeadVdot,
DecoderTableXTHeadVdot32, "XTHeadVdot");
- TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXSfvcp, DecoderTableXSfvcp32,
- "SiFive VCIX");
- TRY_TO_DECODE_FEATURE(
- RISCV::FeatureVendorXSfvqmaccdod, DecoderTableXSfvqmaccdod32,
- "SiFive Matrix Multiplication (2x8 and 8x2) Instruction");
- TRY_TO_DECODE_FEATURE(
- RISCV::FeatureVendorXSfvqmaccqoq, DecoderTableXSfvqmaccqoq32,
- "SiFive Matrix Multiplication (4x8 and 8x4) Instruction");
- TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXSfvfwmaccqqq,
- DecoderTableXSfvfwmaccqqq32,
- "SiFive Matrix Multiplication Instruction");
- TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXSfvfnrclipxfqf,
- DecoderTableXSfvfnrclipxfqf32,
- "SiFive FP32-to-int8 Ranged Clip Instructions");
- TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXSiFivecdiscarddlone,
- DecoderTableXSiFivecdiscarddlone32,
- "SiFive sf.cdiscard.d.l1");
- TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXSiFivecflushdlone,
- DecoderTableXSiFivecflushdlone32,
- "SiFive sf.cflush.d.l1");
+ TRY_TO_DECODE_FEATURE_ANY(XSfVectorGroup, DecoderTableXSfvector32,
+ "SiFive vector extensions");
+ TRY_TO_DECODE_FEATURE_ANY(XSfSystemGroup, DecoderTableXSfsystem32,
+ "SiFive system extensions");
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXSfcease, DecoderTableXSfcease32,
"SiFive sf.cease");
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXMIPSLSP, DecoderTableXmipslsp32,
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td b/llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
index 0654f1ac19a82..da55ee9d0c438 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
@@ -184,7 +184,7 @@ class CustomSiFiveVFNRCLIP<bits<6> funct6, RISCVVFormat opv, string opcodestr>
}
let Predicates = [HasVendorXSfvcp], mayLoad = 0, mayStore = 0,
- hasSideEffects = 1, hasNoSchedulingInfo = 1, DecoderNamespace = "XSfvcp" in {
+ hasSideEffects = 1, hasNoSchedulingInfo = 1, DecoderNamespace = "XSfvector" in {
defm X : CustomSiFiveVCIX<"x", VCIX_X, uimm5, uimm5, GPR>, Sched<[]>;
defm I : CustomSiFiveVCIX<"i", VCIX_X, uimm5, uimm5, simm5>, Sched<[]>;
defm XV : CustomSiFiveVCIX<"xv", VCIX_XV, uimm5, VR, GPR>, Sched<[]>;
@@ -201,7 +201,7 @@ let Predicates = [HasVendorXSfvcp], mayLoad = 0, mayStore = 0,
defm FVW : CustomSiFiveVCIX<"fvw", VCIX_XVW, VR, VR, FPR32>, Sched<[]>;
}
-let Predicates = [HasVendorXSfvqmaccdod], DecoderNamespace = "XSfvqmaccdod",
+let Predicates = [HasVendorXSfvqmaccdod], DecoderNamespace = "XSfvector",
DestEEW = EEWSEWx4, RVVConstraint=VS2Constraint in {
def VQMACCU_2x8x2 : CustomSiFiveVMACC<0b101100, OPMVV, "sf.vqmaccu.2x8x2">;
def VQMACC_2x8x2 : CustomSiFiveVMACC<0b101101, OPMVV, "sf.vqmacc.2x8x2">;
@@ -209,7 +209,7 @@ let Predicates = [HasVendorXSfvqmaccdod], DecoderNamespace = "XSfvqmaccdod",
def VQMACCSU_2x8x2 : CustomSiFiveVMACC<0b101111, OPMVV, "sf.vqmaccsu.2x8x2">;
}
-let Predicates = [HasVendorXSfvqmaccqoq], DecoderNamespace = "XSfvqmaccqoq",
+let Predicates = [HasVendorXSfvqmaccqoq], DecoderNamespace = "XSfvector",
DestEEW = EEWSEWx4, RVVConstraint=WidenV in {
def VQMACCU_4x8x4 : CustomSiFiveVMACC<0b111100, OPMVV, "sf.vqmaccu.4x8x4">;
def VQMACC_4x8x4 : CustomSiFiveVMACC<0b111101, OPMVV, "sf.vqmacc.4x8x4">;
@@ -217,12 +217,12 @@ let Predicates = [HasVendorXSfvqmaccqoq], DecoderNamespace = "XSfvqmaccqoq",
def VQMACCSU_4x8x4 : CustomSiFiveVMACC<0b111111, OPMVV, "sf.vqmaccsu.4x8x4">;
}
-let Predicates = [HasVendorXSfvfwmaccqqq], DecoderNamespace = "XSfvfwmaccqqq",
+let Predicates = [HasVendorXSfvfwmaccqqq], DecoderNamespace = "XSfvector",
DestEEW = EEWSEWx2, RVVConstraint=WidenV in {
def VFWMACC_4x4x4 : CustomSiFiveVMACC<0b111100, OPFVV, "sf.vfwmacc.4x4x4">;
}
-let Predicates = [HasVendorXSfvfnrclipxfqf], DecoderNamespace = "XSfvfnrclipxfqf",
+let Predicates = [HasVendorXSfvfnrclipxfqf], DecoderNamespace = "XSfvector",
Uses = [FRM] in {
def VFNRCLIP_XU_F_QF : CustomSiFiveVFNRCLIP<0b100010, OPFVF, "sf.vfnrclip.xu.f.qf">;
def VFNRCLIP_X_F_QF : CustomSiFiveVFNRCLIP<0b100011, OPFVF, "sf.vfnrclip.x.f.qf">;
@@ -836,7 +836,7 @@ let Predicates = [HasVendorXSfvfnrclipxfqf] in {
let Predicates = [HasVendorXSiFivecdiscarddlone] in {
let hasNoSchedulingInfo = 1, hasSideEffects = 1, mayLoad = 0, mayStore = 0,
- DecoderNamespace = "XSiFivecdiscarddlone" in
+ DecoderNamespace = "XSfsystem" in
def SF_CDISCARD_D_L1
: RVInstIUnary<0b111111000010, 0b000, OPC_SYSTEM, (outs), (ins GPR:$rs1),
"sf.cdiscard.d.l1", "$rs1">, Sched<[]> {
@@ -847,7 +847,7 @@ let Predicates = [HasVendorXSiFivecdiscarddlone] in {
let Predicates = [HasVendorXSiFivecflushdlone] in {
let hasNoSchedulingInfo = 1, hasSideEffects = 1, mayLoad = 0, mayStore = 0,
- DecoderNamespace = "XSiFivecflushdlone" in
+ DecoderNamespace = "XSfsystem" in
def SF_CFLUSH_D_L1
: RVInstIUnary<0b111111000000, 0b000, OPC_SYSTEM, (outs), (ins GPR:$rs1),
"sf.cflush.d.l1", "$rs1">, Sched<[]> {
``````````
</details>
https://github.com/llvm/llvm-project/pull/128794
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