[clang] [llvm] [RISCV] Add Xqccmp Assembly Support (PR #128731)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 25 14:33:00 PST 2025
================
@@ -0,0 +1,35 @@
+# RUN: not llvm-mc -triple=riscv32 -mattr=+experimental-xqccmp -M no-aliases -show-encoding < %s 2>&1 \
+# RUN: | FileCheck -check-prefixes=CHECK-ERROR %s
+
+# CHECK-ERROR: error: invalid operand for instruction
+qc.cm.mvsa01 a1, a2
+
+# CHECK-ERROR: error: rs1 and rs2 must be different
+qc.cm.mvsa01 s0, s0
+
+# CHECK-ERROR: error: invalid operand for instruction
+qc.cm.mva01s a1, a2
+
+# CHECK-ERROR: error: invalid register list, {ra, s0-s10} or {x1, x8-x9, x18-x26} is not supported
+qc.cm.popretz {ra, s0-s10}, 112
+
+# CHECK-ERROR: error: stack adjustment is invalid for this instruction and register list; refer to Zc spec for a detailed range of stack adjustment
----------------
topperc wrote:
I think I'm ok with it for the purposes of this patch. I may see about generating a better error that doesn't point to a spec.
https://github.com/llvm/llvm-project/pull/128731
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