[clang] [llvm] [HLSL] [DXIL] Implement the AddUint64 HLSL function and the UAddc DXIL op (PR #127137)

[Deric Cheung via llvm-commits]

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@@ -0,0 +1,88 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv-unknown-unknown %s -o - | FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o - -filetype=obj | spirv-val %}
+
+; Code here is an excerpt of clang/test/CodeGenHLSL/builtins/AddUint64.hlsl compiled for spirv using the following command
+; clang -cc1 -finclude-default-header -triple spirv-unknown-vulkan-compute clang/test/CodeGenHLSL/builtins/AddUint64.hlsl -emit-llvm -disable-llvm-passes -o llvm/test/CodeGen/SPIRV/hlsl-intrinsics/uadd_with_overflow.ll
+
+; CHECK-DAG: %[[#int_32:]] = OpTypeInt 32 0
+; CHECK-DAG: %[[#vec2_int_32:]] = OpTypeVector %[[#int_32]] 2
+; CHECK-DAG: %[[#bool:]] = OpTypeBool
+; CHECK-DAG: %[[#const_i32_1:]] = OpConstant %[[#int_32]] 1
+; CHECK-DAG: %[[#struct_i32_i32:]] = OpTypeStruct %[[#int_32]] %[[#int_32]]
+; CHECK-DAG: %[[#func_v2i32_v2i32_v2i32:]] = OpTypeFunction %[[#vec2_int_32]] %[[#vec2_int_32]] %[[#vec2_int_32]]
+; CHECK-DAG: %[[#const_i32_0:]] = OpConstant %[[#int_32]] 0
+; CHECK-DAG: %[[#undef_v2i32:]] = OpUndef %[[#vec2_int_32]]
+; CHECK-DAG: %[[#vec4_int_32:]] = OpTypeVector %[[#int_32]] 4
+; CHECK-DAG: %[[#vec2_bool:]] = OpTypeVector %[[#bool]] 2
+; CHECK-DAG: %[[#const_v2i32_0_0:]] = OpConstantComposite %[[#vec2_int_32]] %[[#const_i32_0]] %[[#const_i32_0]]
+; CHECK-DAG: %[[#const_v2i32_1_1:]] = OpConstantComposite %[[#vec2_int_32]] %[[#const_i32_1]] %[[#const_i32_1]]
+; CHECK-DAG: %[[#struct_v2i32_v2i32:]] = OpTypeStruct %[[#vec2_int_32]] %[[#vec2_int_32]]
+; CHECK-DAG: %[[#func_v4i32_v4i32_v4i32:]] = OpTypeFunction %[[#vec4_int_32]] %[[#vec4_int_32]] %[[#vec4_int_32]]
+; CHECK-DAG: %[[#undef_v4i32:]] = OpUndef %[[#vec4_int_32]]
+
+
+define spir_func <2 x i32> @test_AddUint64_uint2(<2 x i32> %a, <2 x i32> %b) {
+entry:
+; CHECK: %[[#a:]] = OpFunctionParameter %[[#vec2_int_32]]
+; CHECK: %[[#b:]] = OpFunctionParameter %[[#vec2_int_32]]
+; CHECK: %[[#a_low:]] = OpCompositeExtract %[[#int_32]] %[[#a]] 0
+; CHECK: %[[#a_high:]] = OpCompositeExtract %[[#int_32]] %[[#a]] 1
+; CHECK: %[[#b_low:]] = OpCompositeExtract %[[#int_32]] %[[#b]] 0
+; CHECK: %[[#b_high:]] = OpCompositeExtract %[[#int_32]] %[[#b]] 1
+; CHECK: %[[#iaddcarry:]] = OpIAddCarry %[[#struct_i32_i32]] %[[#a_low]] %[[#b_low]]
+; CHECK: %[[#lowsum:]] = OpCompositeExtract %[[#int_32]] %[[#iaddcarry]] 0
+; CHECK: %[[#carry:]] = OpCompositeExtract %[[#int_32]] %[[#iaddcarry]] 1
+; CHECK: %[[#carry_ne0:]] = OpINotEqual %[[#bool]] %[[#carry]] %[[#const_i32_0]]
+; CHECK: %[[#select_1_or_0:]] = OpSelect %[[#int_32]] %[[#carry_ne0]] %[[#const_i32_1]] %[[#const_i32_0]]
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Icohedron wrote:

If I switch `-O0` to `-O1` or higher, this select still does not go away. It seems that the SPIRV backend doesn't know `OpIAddCarry`'s second return value is always an i32 0 or 1.

https://github.com/llvm/llvm-project/pull/127137