[llvm] [VP][RISCV][WIP] Add a vp.load.ff intrinsic for fault only first load. (PR #128593)

[Pengcheng Wang via llvm-commits]

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@@ -1911,6 +1911,12 @@ def int_vp_load  : DefaultAttrsIntrinsic<[ llvm_anyvector_ty],
                                llvm_i32_ty],
                              [ NoCapture<ArgIndex<0>>, IntrNoSync, IntrReadMem, IntrWillReturn, IntrArgMemOnly ]>;
 
+def int_vp_load_ff : DefaultAttrsIntrinsic<[ llvm_anyvector_ty, llvm_i32_ty ],
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wangpc-pp wrote:

This may not match SVE because they just change the FFR predicate register. But I haven't come up with a representation that can represent two kinds of semantics.

https://github.com/llvm/llvm-project/pull/128593