[llvm] [DirectX] only allow intrinsics defined in DXIL.td (PR #128613)
Farzon Lotfi via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 24 18:27:19 PST 2025
https://github.com/farzonl updated https://github.com/llvm/llvm-project/pull/128613
>From 69f029514a5cde4c6a6303bc3d3e11c2f554f89f Mon Sep 17 00:00:00 2001
From: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: Mon, 24 Feb 2025 20:11:26 -0500
Subject: [PATCH 1/2] [DirectX] only allow intrinsics defined in DXIL.td Fixes
#128071 The current behavior lets intrinsics that don't map to a DXILOP slip
through. Nothing catches this until we hit the DXIL validator. This change
fails earlier so we don't encode invalid llvm intrinsics that can slip
through because of clang builtins like `__builtin_reduce_and` example:
https://hlsl.godbolt.org/z/13rPj18vn
---
llvm/lib/Target/DirectX/DXILOpLowering.cpp | 7 +++++--
llvm/test/CodeGen/DirectX/unknown_intrinsic.ll | 11 +++++++++++
2 files changed, 16 insertions(+), 2 deletions(-)
create mode 100644 llvm/test/CodeGen/DirectX/unknown_intrinsic.ll
diff --git a/llvm/lib/Target/DirectX/DXILOpLowering.cpp b/llvm/lib/Target/DirectX/DXILOpLowering.cpp
index 83cc4b18824c7..a98107a71c219 100644
--- a/llvm/lib/Target/DirectX/DXILOpLowering.cpp
+++ b/llvm/lib/Target/DirectX/DXILOpLowering.cpp
@@ -770,8 +770,11 @@ class OpLowerer {
continue;
Intrinsic::ID ID = F.getIntrinsicID();
switch (ID) {
- default:
- continue;
+ default: {
+ DiagnosticInfoUnsupported Diag(F, "Unknown intrinsic?");
+ M.getContext().diagnose(Diag);
+ break;
+ }
#define DXIL_OP_INTRINSIC(OpCode, Intrin, ...) \
case Intrin: \
HasErrors |= replaceFunctionWithOp( \
diff --git a/llvm/test/CodeGen/DirectX/unknown_intrinsic.ll b/llvm/test/CodeGen/DirectX/unknown_intrinsic.ll
new file mode 100644
index 0000000000000..efd0c5637077e
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/unknown_intrinsic.ll
@@ -0,0 +1,11 @@
+; RUN: not opt -S -scalarizer -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s 2>&1 | FileCheck %s
+
+; CHECK: error: <unknown>:0:0: in function llvm.vector.reduce.and.v4i32 i32 (<4 x i32>): Unknown intrinsic?
+define i32 @fn_and(<4 x i32> %0) local_unnamed_addr #0 {
+ %2 = tail call i32 @llvm.vector.reduce.and.v4i32(<4 x i32> %0)
+ ret i32 %2
+}
+
+declare i32 @llvm.vector.reduce.and.v4i32(<4 x i32>)
+
+attributes #0 = { convergent norecurse nounwind "hlsl.export"}
>From 3aacbd792e67ef39a8f352dde1fda319c4402d2f Mon Sep 17 00:00:00 2001
From: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: Mon, 24 Feb 2025 21:26:35 -0500
Subject: [PATCH 2/2] allow dx_resource_casthandle through and non intrinsic
functions, fix up some testcases so passes happen in right order and
intrinsics have the right declarations
---
llvm/lib/Target/DirectX/DXILOpLowering.cpp | 3 +++
llvm/test/CodeGen/DirectX/clamp.ll | 2 +-
llvm/test/CodeGen/DirectX/discard.ll | 2 +-
3 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/llvm/lib/Target/DirectX/DXILOpLowering.cpp b/llvm/lib/Target/DirectX/DXILOpLowering.cpp
index a98107a71c219..14296239f6ecb 100644
--- a/llvm/lib/Target/DirectX/DXILOpLowering.cpp
+++ b/llvm/lib/Target/DirectX/DXILOpLowering.cpp
@@ -770,6 +770,9 @@ class OpLowerer {
continue;
Intrinsic::ID ID = F.getIntrinsicID();
switch (ID) {
+ case Intrinsic::dx_resource_casthandle:
+ case Intrinsic::not_intrinsic:
+ continue;
default: {
DiagnosticInfoUnsupported Diag(F, "Unknown intrinsic?");
M.getContext().diagnose(Diag);
diff --git a/llvm/test/CodeGen/DirectX/clamp.ll b/llvm/test/CodeGen/DirectX/clamp.ll
index 6345abc1789bc..54c6aa5040c4a 100644
--- a/llvm/test/CodeGen/DirectX/clamp.ll
+++ b/llvm/test/CodeGen/DirectX/clamp.ll
@@ -286,7 +286,7 @@ declare <3 x half> @llvm.dx.nclamp.v3f16(<3 x half>, <3 x half>, <3 x half>)
declare <4 x float> @llvm.dx.nclamp.v4f32(<4 x float>, <4 x float>, <4 x float>)
declare <2 x double> @llvm.dx.nclamp.v2f64(<2 x double>, <2 x double>, <2 x double>)
declare <4 x i32> @llvm.dx.sclamp.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)
-declare <3 x i16> @llvm.dx.uclamp.v3i32(<3 x i16>, <3 x i32>, <3 x i16>)
+declare <3 x i16> @llvm.dx.uclamp.v3i16(<3 x i16>, <3 x i16>, <3 x i16>)
declare <4 x i32> @llvm.dx.uclamp.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)
declare <2 x i64> @llvm.dx.uclamp.v2i64(<2 x i64>, <2 x i64>, <2 x i64>)
diff --git a/llvm/test/CodeGen/DirectX/discard.ll b/llvm/test/CodeGen/DirectX/discard.ll
index 2a9ec59156e7c..81a96d577ba1a 100644
--- a/llvm/test/CodeGen/DirectX/discard.ll
+++ b/llvm/test/CodeGen/DirectX/discard.ll
@@ -1,4 +1,4 @@
-; RUN: opt -passes='function(scalarizer),module(dxil-op-lower,dxil-intrinsic-expansion)' -S -mtriple=dxil-pc-shadermodel6.3-pixel %s | FileCheck %s
+; RUN: opt -passes='function(scalarizer),module(dxil-intrinsic-expansion,dxil-op-lower)' -S -mtriple=dxil-pc-shadermodel6.3-pixel %s | FileCheck %s
; CHECK-LABEL: define void @test_scalar
; CHECK: call void @dx.op.discard(i32 82, i1 %0)
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